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AMD Northbridge LX: convert spd_read_byte() to non-static version 

Change-Id: Ie329606852dfd7109acb694e9a9ff851b023cc63
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-on: http://review.coreboot.org/3369
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Christian Gmeiner 2013-06-04 17:34:35 +02:00 committed by Ronald G. Minnich
parent 4eb5aa2894
commit c4e07bb503
18 changed files with 20 additions and 17 deletions
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2
src/mainboard/aaeon/pfm-540i_revb/romstage.c
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@ -40,7 +40,7 @@
#define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
if (device != DIMM0) if (device != DIMM0)
return 0xFF; /* No DIMM1, don't even try. */ return 0xFF; /* No DIMM1, don't even try. */

2
src/mainboard/amd/db800/romstage.c
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@ -37,7 +37,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }

2
src/mainboard/amd/norwich/romstage.c
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@ -34,7 +34,7 @@
#include "southbridge/amd/cs5536/early_setup.c" #include "southbridge/amd/cs5536/early_setup.c"
#include "northbridge/amd/lx/raminit.h" #include "northbridge/amd/lx/raminit.h"
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }

2
src/mainboard/artecgroup/dbe61/romstage.c
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@ -35,7 +35,7 @@
#include "southbridge/amd/cs5536/early_setup.c" #include "southbridge/amd/cs5536/early_setup.c"
#include "northbridge/amd/lx/raminit.h" #include "northbridge/amd/lx/raminit.h"
static int spd_read_byte(unsigned device, unsigned address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
int i; int i;

2
src/mainboard/bachmann/ot200/romstage.c
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@ -35,7 +35,7 @@
#include "southbridge/amd/cs5536/early_setup.c" #include "southbridge/amd/cs5536/early_setup.c"
#include "northbridge/amd/lx/raminit.h" #include "northbridge/amd/lx/raminit.h"
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }

2
src/mainboard/digitallogic/msm800sev/romstage.c
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@ -17,7 +17,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
static inline int spd_read_byte(unsigned device, unsigned address) int spd_read_byte(unsigned device, unsigned address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }

2
src/mainboard/iei/pcisa-lx-800-r10/romstage.c
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@ -37,7 +37,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }

2
src/mainboard/iei/pm-lx-800-r11/romstage.c
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@ -37,7 +37,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
/* Only DIMM0 is available. */ /* Only DIMM0 is available. */
if (device != DIMM0) if (device != DIMM0)

2
src/mainboard/iei/pm-lx2-800-r10/romstage.c
View File

@ -38,7 +38,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
/* Only DIMM0 is available. */ /* Only DIMM0 is available. */
if (device != DIMM0) if (device != DIMM0)

2
src/mainboard/lippert/hurricane-lx/romstage.c
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@ -41,7 +41,7 @@
/* Bit0 enables Spread Spectrum. */ /* Bit0 enables Spread Spectrum. */
#define SMC_CONFIG 0x01 #define SMC_CONFIG 0x01
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
if (device != DIMM0) if (device != DIMM0)
return 0xFF; /* No DIMM1, don't even try. */ return 0xFF; /* No DIMM1, don't even try. */

2
src/mainboard/lippert/literunner-lx/romstage.c
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@ -75,7 +75,7 @@ static const unsigned char spdbytes[] = { // 4x Promos V58C2512164SA-J5I
[SPD_tRFC] = 70 // SDRAM Device Minimum Auto Refresh to Active/Auto Refresh [70 ns] [SPD_tRFC] = 70 // SDRAM Device Minimum Auto Refresh to Active/Auto Refresh [70 ns]
}; };
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
if (device != DIMM0) if (device != DIMM0)
return 0xFF; /* No DIMM1, don't even try. */ return 0xFF; /* No DIMM1, don't even try. */

2
src/mainboard/lippert/roadrunner-lx/romstage.c
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@ -38,7 +38,7 @@
#include "superio/ite/it8712f/early_serial.c" #include "superio/ite/it8712f/early_serial.c"
#include "northbridge/amd/lx/raminit.h" #include "northbridge/amd/lx/raminit.h"
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
if (device != DIMM0) if (device != DIMM0)
return 0xFF; /* No DIMM1, don't even try. */ return 0xFF; /* No DIMM1, don't even try. */

2
src/mainboard/lippert/spacerunner-lx/romstage.c
View File

@ -75,7 +75,7 @@ static const unsigned char spdbytes[] = { // 4x Promos V58C2512164SA-J5I
[SPD_tRFC] = 70 // SDRAM Device Minimum Auto Refresh to Active/Auto Refresh [70 ns] [SPD_tRFC] = 70 // SDRAM Device Minimum Auto Refresh to Active/Auto Refresh [70 ns]
}; };
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
if (device != DIMM0) if (device != DIMM0)
return 0xFF; /* No DIMM1, don't even try. */ return 0xFF; /* No DIMM1, don't even try. */

2
src/mainboard/pcengines/alix1c/romstage.c
View File

@ -80,7 +80,7 @@ static const u8 spdbytes[] = {
[SPD_tRRD] = 10, [SPD_tRRD] = 10,
}; };
static u8 spd_read_byte(u8 device, u8 address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
print_debug("spd_read_byte dev "); print_debug("spd_read_byte dev ");
print_debug_hex8(device); print_debug_hex8(device);

2
src/mainboard/pcengines/alix2d/romstage.c
View File

@ -79,7 +79,7 @@ static const u8 spdbytes[] = {
[SPD_tRRD] = 10, [SPD_tRRD] = 10,
}; };
static u8 spd_read_byte(u8 device, u8 address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
print_debug("spd_read_byte dev "); print_debug("spd_read_byte dev ");
print_debug_hex8(device); print_debug_hex8(device);

2
src/mainboard/traverse/geos/romstage.c
View File

@ -35,7 +35,7 @@
#include "southbridge/amd/cs5536/early_setup.c" #include "southbridge/amd/cs5536/early_setup.c"
#include "northbridge/amd/lx/raminit.h" #include "northbridge/amd/lx/raminit.h"
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }

2
src/mainboard/winent/pl6064/romstage.c
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@ -39,7 +39,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
static inline int spd_read_byte(unsigned int device, unsigned int address) int spd_read_byte(unsigned int device, unsigned int address)
{ {
return smbus_read_byte(device, address); return smbus_read_byte(device, address);
} }

3
src/northbridge/amd/lx/raminit.h
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@ -33,4 +33,7 @@ void sdram_enable(int controllers, const struct mem_controller *ctrl);
void sdram_initialize(int controllers, const struct mem_controller *ctrl); void sdram_initialize(int controllers, const struct mem_controller *ctrl);
/* mainboard specific */
int spd_read_byte(unsigned device, unsigned address);
#endif #endif