mb/google/brya: Finish support for ChromeOS GPIOs

BUG=b:181887865
TEST=`crossystem` shows correct state of WP signal when toggled

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: If49ca1d70cc36ab74d70e858336679c0a9a3258e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51312
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Tim Wawrzynczak 2021-03-05 16:40:25 -07:00
parent 812b54ef17
commit c4e9c4e554
2 changed files with 6 additions and 2 deletions

View File

@ -12,14 +12,14 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"}, {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"}, {-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"}, {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
{GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"},
}; };
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
} }
int get_write_protect_state(void) int get_write_protect_state(void)
{ {
/* No write protect */ return gpio_get(GPIO_PCH_WP);
return 0;
} }
void mainboard_chromeos_acpi_generate(void) void mainboard_chromeos_acpi_generate(void)

View File

@ -10,5 +10,9 @@
#define EC_SCI_GPI GPE0_ESPI #define EC_SCI_GPI GPE0_ESPI
/* EC wake is EC_PCH_INT which is routed to GPP_F17 pin */ /* EC wake is EC_PCH_INT which is routed to GPP_F17 pin */
#define GPE_EC_WAKE GPE0_DW2_17 #define GPE_EC_WAKE GPE0_DW2_17
/* WP signal to PCH */
#define GPIO_PCH_WP GPP_E15
/* EC in RW or RO */
#define GPIO_EC_IN_RW GPP_F18
#endif /* __BASEBOARD_GPIO_H__ */ #endif /* __BASEBOARD_GPIO_H__ */