diff --git a/src/mainboard/google/cherry/Makefile.inc b/src/mainboard/google/cherry/Makefile.inc index 4720dc586f..a0862d3646 100644 --- a/src/mainboard/google/cherry/Makefile.inc +++ b/src/mainboard/google/cherry/Makefile.inc @@ -7,10 +7,13 @@ verstage-y += chromeos.c verstage-y += reset.c romstage-y += memlayout.ld +romstage-y += boardid.c romstage-y += chromeos.c romstage-y += romstage.c +romstage-y += sdram_configs.c ramstage-y += memlayout.ld +ramstage-y += boardid.c ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += reset.c diff --git a/src/mainboard/google/cherry/boardid.c b/src/mainboard/google/cherry/boardid.c new file mode 100644 index 0000000000..34d7692557 --- /dev/null +++ b/src/mainboard/google/cherry/boardid.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +uint32_t ram_code(void) +{ + return 0; +} diff --git a/src/mainboard/google/cherry/romstage.c b/src/mainboard/google/cherry/romstage.c index ec7e4f9a0c..5505d8ac48 100644 --- a/src/mainboard/google/cherry/romstage.c +++ b/src/mainboard/google/cherry/romstage.c @@ -2,6 +2,7 @@ #include #include +#include #include #include #include @@ -15,5 +16,6 @@ void platform_romstage_main(void) mt6315_init(); clk_buf_init(); rtc_boot(); + mtk_dram_init(); scp_rsi_enable(); } diff --git a/src/mainboard/google/cherry/sdram_configs.c b/src/mainboard/google/cherry/sdram_configs.c new file mode 100644 index 0000000000..de6bdd1f05 --- /dev/null +++ b/src/mainboard/google/cherry/sdram_configs.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +const struct sdram_info *get_sdram_config(void) +{ + /* + * The MT8195 platform supports "dram adaptive" feature to + * automatically detect dram information, including channel, rank, die size..., + * and can automatically configure EMI settings. + * So we will be passing a placeholder param blob. + */ + static struct sdram_info params; + return ¶ms; +}