mb/starlabs/starbook/rpl: Fix the Thunderbolt cmos option
For Thunderbolt to be disabled, `UsbTcPortEn` and `TcssXhciEn` also need to be disabled. Change-Id: Ie02c1e0ea7583bbd78e25c8184e2cdf2b6281741 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77200 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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@ -7,3 +7,4 @@ romstage-y += romstage.c
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ramstage-y += devtree.c
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ramstage-y += devtree.c
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ramstage-y += gpio.c
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ramstage-y += gpio.c
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ramstage-y += hda_verb.c
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ramstage-y += hda_verb.c
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ramstage-y += ramstage.c
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@ -0,0 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <option.h>
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#include <soc/ramstage.h>
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void mainboard_silicon_init_params(FSP_S_CONFIG *supd)
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{
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if (get_uint_option("thunderbolt", 1) == 0)
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supd->UsbTcPortEn = 0;
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}
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@ -40,6 +40,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
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mupd->FspmConfig.VtdBaseAddress[3] = 0;
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mupd->FspmConfig.VtdBaseAddress[3] = 0;
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mupd->FspmConfig.TcssDma0En = 0;
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mupd->FspmConfig.TcssDma0En = 0;
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mupd->FspmConfig.TcssItbtPcie0En = 0;
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mupd->FspmConfig.TcssItbtPcie0En = 0;
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mupd->FspmConfig.TcssXhciEn = 0;
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}
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}
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mupd->FspmConfig.DmiMaxLinkSpeed = 4;
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mupd->FspmConfig.DmiMaxLinkSpeed = 4;
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