util/marvell: Add Marvell doimage utility and dependency in relevant Makefile
- Add the doimage sources in util/marvell - Add dependency in root makefile - Add dependency in makefile for armada38x soc BUG=chrome-os-partner:47462 TEST=emerge-cyclone coreboot BRANCH=tot Change-Id: I81b30e0865cbd619a41659c3f2819ad3bafc5f24 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4b2a990150580e0b879a346ed8b71b3765b66bab Original-Change-Id: I7e89b5e96206fde97ce69c296850122fd6c858f9 Original-Signed-off-by: Kefei Yao <kfyao@marvell.com> Original-Reviewed-on: https://chromium-review.googlesource.com/318046 Original-Commit-Ready: Kan Yan <kyan@google.com> Original-Tested-by: Kan Yan <kyan@google.com> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Kan Yan <kyan@google.com> Original-Reviewed-by: Yuji Sasaki <sasakiy@chromium.org> Reviewed-on: https://review.coreboot.org/13137 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Ruilin Hao
Patrick Georgi
parent
3bc543a5c3
commit
c52d4f5745
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@ -71,7 +71,7 @@ subdirs-y += src/ec/acpi $(wildcard src/ec/*/*) $(wildcard src/southbridge/*/*)
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subdirs-y += $(wildcard src/soc/*/*) $(wildcard src/northbridge/*/*)
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subdirs-y += src/superio $(wildcard src/drivers/*) src/cpu src/vendorcode
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subdirs-y += util/cbfstool util/sconfig util/nvramtool util/broadcom
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subdirs-y += util/futility
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subdirs-y += util/futility util/marvell
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subdirs-y += $(wildcard src/arch/*)
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subdirs-y += src/mainboard/$(MAINBOARDDIR)
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subdirs-y += payloads/external
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@ -34,10 +34,10 @@ ramstage-y += clock.c
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CPPFLAGS_common += -Isrc/soc/marvell/armada38x/include/ -Isrc/commonlib/include/commonlib/
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BIN_HDR = 3rdparty/blobs/cpu/marvell/armada38x/bin_hdr.bin
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DOIMAGE = 3rdparty/blobs/cpu/marvell/armada38x/doimage
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BIN_HDR = 3rdparty/cpu/marvell/armada38x/bin_hdr.bin
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DOIMAGE = $(objutil)/marvell/doimage_mv/doimage
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
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$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(DOIMAGE)
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@chmod a+x $(DOIMAGE)
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$(DOIMAGE) -T flash -D 0 -E 0 -G $(BIN_HDR) $< $@
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rm $<
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@ -0,0 +1 @@
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subdirs-$(CONFIG_SOC_MARVELL_ARMADA38X) += doimage_mv
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@ -0,0 +1,13 @@
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DOIMAGE_FOLDER = marvell/doimage_mv
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DOIMAGE_BINARY = doimage
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CFLAGS = -g -O1 -I./../inc -DMV_CPU_LE
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$(objutil)/$(DOIMAGE_FOLDER):
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mkdir -p $@
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$(objutil)/$(DOIMAGE_FOLDER)/doimage.o: $(top)/util/marvell/doimage_mv/doimage.c $(objutil)/$(DOIMAGE_FOLDER)
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$(HOSTCC) $(CFLAGS) -c $< -o $@
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$(objutil)/$(DOIMAGE_FOLDER)/$(DOIMAGE_BINARY): $(objutil)/$(DOIMAGE_FOLDER)/doimage.o
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$(HOSTCC) $(CFLAGS) -o $@ $^
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@ -0,0 +1,171 @@
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/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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disclaimer.
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*******************************************************************************/
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#ifndef _INC_BOOTSTRAP__DEF_H
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#define _INC_BOOTSTRAP__DEF_H
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#include "bootstrap_os.h"
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#ifndef MV_ASMLANGUAGE
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#define MAIN_HDR_VERSION 1
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#define MAIN_HDR_NAND_SLC 0
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#define MAIN_HDR_NAND_MLC 1
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typedef struct BHR_t {
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/* type name byte order */
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MV_U8 blockID; /* 0 */
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MV_U8 flags; /* 1 */
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MV_U16 nandPageSize; /* 2-3 */
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MV_U32 blockSize; /* 4-7 */
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MV_U8 version; /* 8 */
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MV_U8 hdrSizeMsb; /* 9 */
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MV_U16 hdrSizeLsb; /* 10-11 */
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MV_U32 sourceAddr; /* 12-15 */
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MV_U32 destinationAddr; /* 16-19 */
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MV_U32 executionAddr; /* 20-23 */
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MV_U8 options; /* 24 */
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MV_U8 nandBlockSize; /* 25 */
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MV_U8 nandTechnology; /* 26 */
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MV_U8 rsvd4; /* 27 */
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MV_U16 rsvd2; /* 28-29 */
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MV_U8 ext; /* 30 */
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MV_U8 checkSum; /* 31 */
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} BHR_t, *pBHR_t;
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#define MAIN_HDR_GET_LEN(pHdr) \
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(((MV_U32)((pHdr)->hdrSizeMsb) << 16) | ((MV_U32)((pHdr)->hdrSizeLsb)))
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#define EXT_HDR_TYP_SECURITY 0x01
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#define EXT_HDR_TYP_BINARY 0x02
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#define EXT_HDR_TYP_REGISTER 0x03
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typedef struct headExtBHR_t {/* Common extension header head */
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// type name byte order
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MV_U8 type;
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MV_U8 lenMsb;
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MV_U16 lenLsb;
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} headExtBHR_t;
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#define EXT_HDR_SET_LEN(pHead, len) \
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do { \
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(pHead)->lenMsb = ((len)&0x00FF0000) >> 16; \
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(pHead)->lenLsb = (len)&0x0000FFFF; \
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} while (0)
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#define EXT_HDR_GET_LEN(pHead) \
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(((MV_U32)((pHead)->lenMsb) << 16) | ((pHead)->lenLsb))
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typedef struct tailExtBHR_t {/* Common extension header tail */
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// type name byte order
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MV_U8 nextHdr;
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MV_U8 delay;
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MV_U16 rsvd2;
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} tailExtBHR_t;
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typedef struct publicKey_t {/* public key*/
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MV_U8 Key[524];
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} publicKey_t;
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#define RSA_MAX_KEY_LEN_BYTES 256
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typedef struct secExtBHR_t {
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headExtBHR_t head;
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MV_U8 encrypt;
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MV_U8 rsrvd0;
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MV_U16 rsrvd1;
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publicKey_t pubKey;
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MV_U8 jtagEn;
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MV_U8 rsrvd2;
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MV_U16 rsrvd3;
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MV_U32 boxId;
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MV_U32 flashId;
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MV_U8 hdrSign[256];
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MV_U8 imgSign[256];
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publicKey_t cskArray[16];
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MV_U8 cskBlockSign[256];
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tailExtBHR_t tail;
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} secExtBHR_t, *pSecExtBHR_T;
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/***********************/
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/* SECURE PARAMS */
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/***********************/
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#define CSK_BLOCK_OFFSET 0x420
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#define PUB_KEY_SIZE 524
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#define CSK_KEY_NUM 16
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#define CSK_BLOCK_SIGN_OFFSET (CSK_BLOCK_OFFSET + (PUB_KEY_SIZE * CSK_KEY_NUM))
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/* 16 keys + 256 bytes long signature */
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#define CSK_BLOCK_SIZE ((PUB_KEY_SIZE * CSK_KEY_NUM) + 0x100)
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#define BOOTROM_SIZE (64 * 1024)
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#define EXT_HDR_BASE_SIZE (sizeof(headExtBHR_t) + sizeof(tailExtBHR_t))
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/* MAX size of entire headers block */
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#define MAX_HEADER_SIZE (192 * 1024)
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#define MAX_TWSI_HDR_SIZE \
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(60 * 1024) /* MAX eeprom is 64K & leave 4K for image and header */
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/* Boot Type - block ID */
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#define IBR_HDR_I2C_ID 0x4D
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#define IBR_HDR_SPI_ID 0x5A
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#define IBR_HDR_NAND_ID 0x8B
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#define IBR_HDR_SATA_ID 0x78
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#define IBR_HDR_PEX_ID 0x9C
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#define IBR_HDR_MMC_ID 0xAE
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#define IBR_HDR_UART_ID 0x69
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#define IBR_DEF_ATTRIB 0x00
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/* ROM flags */
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#define BHR_FLAG_PRINT_EN 0x01
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#define BHR_FLAG_RESERVED1 0x02
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#define BHR_FLAG_RESERVED2 0x04
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#define BHR_FLAG_RESERVED3 0x08
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#define BHR_FLAG_RESERVED4 0x10
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#define BHR_FLAG_RESERVED5 0x20
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#define BHR_FLAG_RESERVED6 0x40
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#define BHR_FLAG_RESERVED7 0x80
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/* ROM options */
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#define BHR_OPT_BAUDRATE_OFFS 0x0
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#define BHR_OPT_BAUDRATE_MASK (0x7 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_BAUD_DEFAULT (0x0 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_BAUD_2400 (0x1 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_BAUD_4800 (0x2 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_BAUD_9600 (0x3 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_BAUD_19200 (0x4 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_BAUD_38400 (0x5 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_BAUD_57600 (0x6 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_BAUD_115200 (0x7 << BHR_OPT_BAUDRATE_OFFS)
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#define BHR_OPT_UART_PORT_OFFS 0x3
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#define BHR_OPT_UART_PORT_MASK (0x3 << BHR_OPT_UART_PORT_OFFS)
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#define BHR_OPT_UART_MPPS_OFFS 0x5
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#define BHR_OPT_UART_MPPS_MASK (0x7 << BHR_OPT_UART_MPPS_OFFS)
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typedef struct _mvCpuArmClk {
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MV_U32 cpuClk; /* CPU clock MHz */
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MV_U32 ddrClk; /* DDR clock MHz */
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MV_U32 l2cClk; /* L2 cache clock MHz */
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} MV_CPU_ARM_CLK;
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#endif /* MV_ASMLANGUAGE */
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#endif /* _INC_BOOTSTRAP_H */
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@ -0,0 +1,403 @@
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/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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disclaimer.
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*******************************************************************************/
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#ifndef _INC_BOOTSTRAP_OS_H
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#define _INC_BOOTSTRAP_OS_H
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/* BE/ LE swap for Asm */
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#if defined(MV_CPU_LE)
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#define htoll(x) x
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#define HTOLL(sr, tr)
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#elif defined(MV_CPU_BE)
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#define htoll(x) \
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((((x)&0x00ff) << 24) | (((x)&0xff00) << 8) | (((x) >> 8) & 0xff00) | \
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(((x) >> 24) & 0x00ff))
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#define HTOLL(sr, temp) do { /*sr = A ,B ,C ,D */ \
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eor temp, sr, sr, ROR #16; /*temp = A^C,B^D,C^A,D^B */ \
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bic temp, temp, #0xFF0000; /*temp = A^C,0 ,C^A,D^B */ \
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mov sr, sr, ROR #8; /*sr = D ,A ,B ,C */ \
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eor sr, sr, temp, LSR #8 /*sr = D ,C ,B ,A */ \
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} while (0)
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#endif
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#define MV_REG_READ_ASM(toReg, tmpReg, regOffs) do { \
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ldr tmpReg, = (INTER_REGS_BASE + regOffs); \
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ldr toReg, [tmpReg]; \
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HTOLL(toReg, tmpReg) \
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} while (0)
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#define MV_REG_WRITE_ASM(fromReg, tmpReg, regOffs) \
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HTOLL(fromReg, tmpReg); \
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ldr tmpReg, = (INTER_REGS_BASE + regOffs); \
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str fromReg, [tmpReg]
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#define MV_DV_REG_READ_ASM(toReg, tmpReg, regOffs) \
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ldr tmpReg, = (CFG_DFL_MV_REGS + regOffs); \
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ldr toReg, [tmpReg]; \
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HTOLL(toReg, tmpReg)
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#define MV_DV_REG_WRITE_ASM(fromReg, tmpReg, regOffs) \
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HTOLL(fromReg, tmpReg); \
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ldr tmpReg, = (CFG_DFL_MV_REGS + regOffs); \
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str fromReg, [tmpReg]
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/* Defines */
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/* The following is a list of Marvell status */
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#define MV_ERROR (-1)
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#define MV_OK (0x00) /* Operation succeeded */
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#define MV_FAIL (0x01) /* Operation failed */
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#define MV_BAD_VALUE (0x02) /* Illegal value (general) */
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#define MV_OUT_OF_RANGE (0x03) /* The value is out of range */
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#define MV_BAD_PARAM (0x04) /* Illegal parameter in function called */
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#define MV_BAD_PTR (0x05) /* Illegal pointer value */
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#define MV_BAD_SIZE (0x06) /* Illegal size */
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#define MV_BAD_STATE (0x07) /* Illegal state of state machine */
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#define MV_SET_ERROR (0x08) /* Set operation failed */
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#define MV_GET_ERROR (0x09) /* Get operation failed */
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#define MV_CREATE_ERROR (0x0A) /* Fail while creating an item */
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#define MV_NOT_FOUND (0x0B) /* Item not found */
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#define MV_NO_MORE (0x0C) /* No more items found */
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#define MV_NO_SUCH (0x0D) /* No such item */
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#define MV_TIMEOUT (0x0E) /* Time Out */
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#define MV_NO_CHANGE (0x0F) /* Parameter(s) is already in this value */
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#define MV_NOT_SUPPORTED (0x10) /* This request is not support */
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#define MV_NOT_IMPLEMENTED (0x11) /* Request supported but not implemented */
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#define MV_NOT_INITIALIZED (0x12) /* The item is not initialized */
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#define MV_NO_RESOURCE (0x13) /* Resource not available (memory ...) */
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#define MV_FULL (0x14) /* Item is full (Queue or table etc...) */
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#define MV_EMPTY (0x15) /* Item is empty (Queue or table etc...) */
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#define MV_INIT_ERROR (0x16) /* Error occurred while INIT process */
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#define MV_HW_ERROR (0x17) /* Hardware error */
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#define MV_TX_ERROR (0x18) /* Transmit operation not succeeded */
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#define MV_RX_ERROR (0x19) /* Receive operation not succeeded */
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#define MV_NOT_READY (0x1A) /* The other side is not ready yet */
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#define MV_ALREADY_EXIST (0x1B) /* Tried to create existing item */
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#define MV_OUT_OF_CPU_MEM (0x1C) /* Cpu memory allocation failed. */
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#define MV_NOT_STARTED (0x1D) /* Not started yet */
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#define MV_BUSY (0x1E) /* Item is busy. */
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#define MV_TERMINATE (0x1F) /* Item terminates it's work. */
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#define MV_NOT_ALIGNED (0x20) /* Wrong alignment */
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#define MV_NOT_ALLOWED (0x21) /* Operation NOT allowed */
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#define MV_WRITE_PROTECT (0x22) /* Write protected */
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#define MV_INVALID (int)(-1)
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#define MV_FALSE 0
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#define MV_TRUE (!(MV_FALSE))
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#ifndef NULL
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#define NULL ((void *)0)
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#endif
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#ifndef MV_ASMLANGUAGE
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/* typedefs */
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typedef char MV_8;
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typedef unsigned char MV_U8;
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typedef int MV_32;
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typedef unsigned int MV_U32;
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typedef short MV_16;
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typedef unsigned short MV_U16;
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/*
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#ifdef MV_PPC64
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typedef long MV_64;
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typedef unsigned long MV_U64;
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#else
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typedef long long MV_64;
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typedef unsigned long long MV_U64;
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#endif
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*/
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typedef long MV_LONG; /* 32/64 */
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typedef unsigned long MV_ULONG; /* 32/64 */
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typedef int MV_STATUS;
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typedef int MV_BOOL;
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/*typedef void MV_VOID;*/
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#define MV_VOID void
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typedef float MV_FLOAT;
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typedef int (*MV_FUNCPTR)(void); /* ptr to function returning int */
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typedef void (*MV_VOIDFUNCPTR)(void); /* ptr to function returning void */
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typedef double (*MV_DBLFUNCPTR)(void); /* ptr to function returning double*/
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typedef float (*MV_FLTFUNCPTR)(void); /* ptr to function returning float */
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typedef MV_U32 MV_KHZ;
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typedef MV_U32 MV_MHZ;
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typedef MV_U32 MV_HZ;
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#if defined(_HOST_COMPILER)
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#define __MV_PACKED
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#else
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#define __MV_PACKED /*__packed*/
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#endif
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#endif /* MV_ASMLANGUAGE */
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/* Bit field definitions */
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#define NO_BIT 0x00000000
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#define BIT0 0x00000001
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#define BIT1 0x00000002
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||||
#define BIT2 0x00000004
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#define BIT3 0x00000008
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||||
#define BIT4 0x00000010
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||||
#define BIT5 0x00000020
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#define BIT6 0x00000040
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#define BIT7 0x00000080
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#define BIT8 0x00000100
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||||
#define BIT9 0x00000200
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#define BIT10 0x00000400
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#define BIT11 0x00000800
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||||
#define BIT12 0x00001000
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#define BIT13 0x00002000
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#define BIT14 0x00004000
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||||
#define BIT15 0x00008000
|
||||
#define BIT16 0x00010000
|
||||
#define BIT17 0x00020000
|
||||
#define BIT18 0x00040000
|
||||
#define BIT19 0x00080000
|
||||
#define BIT20 0x00100000
|
||||
#define BIT21 0x00200000
|
||||
#define BIT22 0x00400000
|
||||
#define BIT23 0x00800000
|
||||
#define BIT24 0x01000000
|
||||
#define BIT25 0x02000000
|
||||
#define BIT26 0x04000000
|
||||
#define BIT27 0x08000000
|
||||
#define BIT28 0x10000000
|
||||
#define BIT29 0x20000000
|
||||
#define BIT30 0x40000000
|
||||
#define BIT31 0x80000000
|
||||
|
||||
/* includes */
|
||||
#define _1K 0x00000400
|
||||
#define _4K 0x00001000
|
||||
#define _8K 0x00002000
|
||||
#define _16K 0x00004000
|
||||
#define _32K 0x00008000
|
||||
#define _64K 0x00010000
|
||||
#define _128K 0x00020000
|
||||
#define _256K 0x00040000
|
||||
#define _512K 0x00080000
|
||||
/* Sizes */
|
||||
#define _1M 0x00100000
|
||||
#define _2M 0x00200000
|
||||
#define _4M 0x00400000
|
||||
#define _8M 0x00800000
|
||||
#define _16M 0x01000000
|
||||
#define _32M 0x02000000
|
||||
#define _64M 0x04000000
|
||||
#define _128M 0x08000000
|
||||
#define _256M 0x10000000
|
||||
#define _512M 0x20000000
|
||||
#define _1G 0x40000000
|
||||
#define _2G 0x80000000
|
||||
/* Speed */
|
||||
#define _25MHZ 25000000
|
||||
#define _125MHZ 125000000
|
||||
#define _133MHZ 133333333
|
||||
#define _150MHZ 150000000
|
||||
#define _166MHZ 166666667
|
||||
#define _200MHZ 200000000
|
||||
#define _250MHZ 250000000
|
||||
|
||||
/* Swap tool */
|
||||
|
||||
/* 16bit nibble swap. For example 0x1234 -> 0x2143 */
|
||||
#define MV_NIBBLE_SWAP_16BIT(X) \
|
||||
(((X & 0xf) << 4) | ((X & 0xf0) >> 4) | ((X & 0xf00) << 4) | \
|
||||
((X & 0xf000) >> 4))
|
||||
|
||||
/* 32bit nibble swap. For example 0x12345678 -> 0x21436587 */
|
||||
#define MV_NIBBLE_SWAP_32BIT(X) \
|
||||
(((X & 0xf) << 4) | ((X & 0xf0) >> 4) | ((X & 0xf00) << 4) | \
|
||||
((X & 0xf000) >> 4) | ((X & 0xf0000) << 4) | ((X & 0xf00000) >> 4) | \
|
||||
((X & 0xf000000) << 4) | ((X & 0xf0000000) >> 4))
|
||||
|
||||
/* 16bit byte swap. For example 0x1122 -> 0x2211 */
|
||||
#define MV_BYTE_SWAP_16BIT(X) ((((X)&0xff) << 8) | (((X)&0xff00) >> 8))
|
||||
|
||||
/* 32bit byte swap. For example 0x11223344 -> 0x44332211 */
|
||||
#define MV_BYTE_SWAP_32BIT(X) \
|
||||
((((X)&0xff) << 24) | (((X)&0xff00) << 8) | (((X)&0xff0000) >> 8) | \
|
||||
(((X)&0xff000000) >> 24))
|
||||
|
||||
/* 64bit byte swap. For example 0x11223344.55667788 -> 0x88776655.44332211 */
|
||||
#define MV_BYTE_SWAP_64BIT(X) \
|
||||
((l64)((((X)&0xffULL) << 56) | (((X)&0xff00ULL) << 40) | \
|
||||
(((X)&0xff0000ULL) << 24) | (((X)&0xff000000ULL) << 8) | \
|
||||
(((X)&0xff00000000ULL) >> 8) | \
|
||||
(((X)&0xff0000000000ULL) >> 24) | \
|
||||
(((X)&0xff000000000000ULL) >> 40) | \
|
||||
(((X)&0xff00000000000000ULL) >> 56)))
|
||||
|
||||
/* Endianness macros. */
|
||||
#if defined(MV_CPU_LE)
|
||||
#define MV_16BIT_LE(X) (X)
|
||||
#define MV_32BIT_LE(X) (X)
|
||||
#define MV_64BIT_LE(X) (X)
|
||||
#define MV_16BIT_BE(X) MV_BYTE_SWAP_16BIT(X)
|
||||
#define MV_32BIT_BE(X) MV_BYTE_SWAP_32BIT(X)
|
||||
#define MV_64BIT_BE(X) MV_BYTE_SWAP_64BIT(X)
|
||||
#elif defined(MV_CPU_BE)
|
||||
#define MV_16BIT_LE(X) MV_BYTE_SWAP_16BIT(X)
|
||||
#define MV_32BIT_LE(X) MV_BYTE_SWAP_32BIT(X)
|
||||
#define MV_64BIT_LE(X) MV_BYTE_SWAP_64BIT(X)
|
||||
#define MV_16BIT_BE(X) (X)
|
||||
#define MV_32BIT_BE(X) (X)
|
||||
#define MV_64BIT_BE(X) (X)
|
||||
#else
|
||||
#error "CPU endianness isn't defined!\n"
|
||||
#endif
|
||||
|
||||
#ifndef MV_ASMLANGUAGE
|
||||
/* Get the min between 'a' or 'b' */
|
||||
#define MV_MIN(a, b) (((a) < (b)) ? (a) : (b))
|
||||
|
||||
/* Marvell controller register read/write macros */
|
||||
#define CPU_PHY_MEM(x) ((MV_U32) x)
|
||||
#define CPU_MEMIO_CACHED_ADDR(x) ((void *) x)
|
||||
#define CPU_MEMIO_UNCACHED_ADDR(x) ((void *) x)
|
||||
|
||||
/* CPU architecture dependent 32, 16, 8 bit read/write IO addresses */
|
||||
#define MV_MEMIO32_WRITE(addr, data) \
|
||||
((*((volatile unsigned int *)(addr))) = ((unsigned int)(data)))
|
||||
|
||||
#define MV_MEMIO32_READ(addr) ((*((volatile unsigned int *)(addr))))
|
||||
|
||||
#define MV_MEMIO16_WRITE(addr, data) \
|
||||
((*((volatile unsigned short *)(addr))) = ((unsigned short)(data)))
|
||||
|
||||
#define MV_MEMIO16_READ(addr) ((*((volatile unsigned short *)(addr))))
|
||||
|
||||
#define MV_MEMIO8_WRITE(addr, data) \
|
||||
((*((volatile unsigned char *)(addr))) = ((unsigned char)(data)))
|
||||
|
||||
#define MV_MEMIO8_READ(addr) ((*((volatile unsigned char *)(addr))))
|
||||
|
||||
/* No Fast Swap implementation (in assembler) for ARM */
|
||||
#define MV_32BIT_LE_FAST(val) MV_32BIT_LE(val)
|
||||
#define MV_16BIT_LE_FAST(val) MV_16BIT_LE(val)
|
||||
#define MV_32BIT_BE_FAST(val) MV_32BIT_BE(val)
|
||||
#define MV_16BIT_BE_FAST(val) MV_16BIT_BE(val)
|
||||
|
||||
/* 32 and 16 bit read/write in big/little endian mode */
|
||||
|
||||
/* 16bit write in little endian mode */
|
||||
#define MV_MEMIO_LE16_WRITE(addr, data) \
|
||||
MV_MEMIO16_WRITE(addr, MV_16BIT_LE_FAST(data))
|
||||
|
||||
/* 16bit read in little endian mode */
|
||||
static inline MV_U16 MV_MEMIO_LE16_READ(void *addr)
|
||||
{
|
||||
MV_U16 data;
|
||||
MV_U16 *addr1 = (MV_U16 *)addr;
|
||||
|
||||
data = (MV_U16)MV_MEMIO16_READ(addr1);
|
||||
|
||||
return (MV_U16)MV_16BIT_LE_FAST(data);
|
||||
}
|
||||
|
||||
/* 32bit write in little endian mode */
|
||||
#define MV_MEMIO_LE32_WRITE(addr, data) \
|
||||
MV_MEMIO32_WRITE(addr, MV_32BIT_LE_FAST(data))
|
||||
|
||||
/* 32bit read in little endian mode */
|
||||
static inline MV_U32 MV_MEMIO_LE32_READ(void *addr)
|
||||
{
|
||||
MV_U32 data;
|
||||
MV_U32 *addr1 = (MV_U32 *)addr;
|
||||
|
||||
data = (MV_U32)MV_MEMIO32_READ(addr1);
|
||||
|
||||
return (MV_U32)MV_32BIT_LE_FAST(data);
|
||||
}
|
||||
|
||||
/* Flash APIs */
|
||||
#define MV_FL_8_READ MV_MEMIO8_READ
|
||||
#define MV_FL_16_READ MV_MEMIO_LE16_READ
|
||||
#define MV_FL_32_READ MV_MEMIO_LE32_READ
|
||||
#define MV_FL_8_DATA_READ MV_MEMIO8_READ
|
||||
#define MV_FL_16_DATA_READ MV_MEMIO16_READ
|
||||
#define MV_FL_32_DATA_READ MV_MEMIO32_READ
|
||||
#define MV_FL_8_WRITE MV_MEMIO8_WRITE
|
||||
#define MV_FL_16_WRITE MV_MEMIO_LE16_WRITE
|
||||
#define MV_FL_32_WRITE MV_MEMIO_LE32_WRITE
|
||||
#define MV_FL_8_DATA_WRITE MV_MEMIO8_WRITE
|
||||
#define MV_FL_16_DATA_WRITE MV_MEMIO16_WRITE
|
||||
#define MV_FL_32_DATA_WRITE MV_MEMIO32_WRITE
|
||||
|
||||
/* CPU cache information */
|
||||
#define CPU_I_CACHE_LINE_SIZE 32 /* 2do: replace 32 with linux core macro */
|
||||
#define CPU_D_CACHE_LINE_SIZE 32 /* 2do: replace 32 with linux core macro */
|
||||
|
||||
#define MV_REG_VALUE(offset) (MV_MEMIO32_READ((INTER_REGS_BASE | (offset))))
|
||||
|
||||
#define MV_REG_READ(offset) (MV_MEMIO_LE32_READ(INTER_REGS_BASE | (offset)))
|
||||
|
||||
#define MV_REG_WRITE(offset, val) \
|
||||
MV_MEMIO_LE32_WRITE((INTER_REGS_BASE | (offset)), (val))
|
||||
|
||||
#define MV_REG_BYTE_READ(offset) (MV_MEMIO8_READ((INTER_REGS_BASE | (offset))))
|
||||
|
||||
#define MV_REG_BYTE_WRITE(offset, val) \
|
||||
MV_MEMIO8_WRITE((INTER_REGS_BASE | (offset)), (val))
|
||||
|
||||
#define MV_REG_SHORT_READ(offset) \
|
||||
(MV_MEMIO_LE16_READ(INTER_REGS_BASE | (offset)))
|
||||
|
||||
#define MV_REG_BIT_SET(offset, bitMask) \
|
||||
(MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \
|
||||
(MV_MEMIO32_READ((INTER_REGS_BASE | (offset))) | \
|
||||
MV_32BIT_LE_FAST((bitMask)))))
|
||||
|
||||
#define MV_REG_BIT_RESET(offset, bitMask) \
|
||||
(MV_MEMIO32_WRITE((INTER_REGS_BASE | (offset)), \
|
||||
(MV_MEMIO32_READ((INTER_REGS_BASE | (offset))) & \
|
||||
MV_32BIT_LE_FAST(~(bitMask)))))
|
||||
|
||||
#define mvOsUDelay uDelay
|
||||
#define mvOsMDelay(msec) uDelay(msec * 1000)
|
||||
#define mvOsDelay(sec) mvOsMDelay(sec * 1000)
|
||||
|
||||
#define u32 MV_U32
|
||||
#define u16 MV_U16
|
||||
#define u8 MV_U8
|
||||
#define s16 short
|
||||
#define s32 long
|
||||
#define s8 char
|
||||
|
||||
#define UINT32 MV_U32
|
||||
#define UINT16 MV_U16
|
||||
#define UINT8 MV_U8
|
||||
|
||||
typedef UINT32 * PUINT32;
|
||||
typedef UINT16 * PUINT16;
|
||||
typedef UINT8 * PUINT8;
|
||||
|
||||
#define TRUE MV_TRUE
|
||||
#define FALSE MV_FALSE
|
||||
|
||||
#endif /* #ifndef MV_ASMLANGUAGE */
|
||||
|
||||
#endif /* _INC_BOOTSTRAP_OS_H */
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,155 @@
|
|||
/*******************************************************************************
|
||||
Copyright (C) Marvell International Ltd. and its affiliates
|
||||
|
||||
Marvell GPL License Option
|
||||
|
||||
If you received this File from Marvell, you may opt to use, redistribute and/or
|
||||
modify this File in accordance with the terms and conditions of the General
|
||||
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
|
||||
available along with the File in the license.txt file or by writing to the Free
|
||||
Software Foundation, Inc.
|
||||
|
||||
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
|
||||
DISCLAIMED. The GPL License provides additional details about this warranty
|
||||
disclaimer.
|
||||
|
||||
*******************************************************************************/
|
||||
#ifndef _INC_DOIMAGE_H
|
||||
#define _INC_DOIMAGE_H
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
/* use the same version as in "bootrom.inc" file */
|
||||
#define VERSION_NUMBER "2.20"
|
||||
#define PRODUCT_SUPPORT "Marvell Armada-3xx series"
|
||||
|
||||
#define RSA_KEY_SIZE 2048
|
||||
#define RSA_EXPONENT 65537
|
||||
|
||||
#define T_OPTION_MASK 0x1 /* image type */
|
||||
#define D_OPTION_MASK 0x2 /* image destination */
|
||||
#define E_OPTION_MASK 0x4 /* image execution address */
|
||||
#define S_OPTION_MASK 0x8 /* starting sector */
|
||||
#define R_OPTION_MASK 0x10 /* DRAM file */
|
||||
#define C_OPTION_MASK 0x20 /* headers definition file */
|
||||
#define P_OPTION_MASK 0x40 /* NAND Page size */
|
||||
#define M_OPTION_MASK 0x80 /* TWSI serial init file */
|
||||
#define W_OPTION_MASK 0x100 /* HEX file width */
|
||||
#define H_OPTION_MASK 0x200 /* Header mode */
|
||||
#define X_OPTION_MASK 0x400 /* Pre padding */
|
||||
#define Y_OPTION_MASK 0x800 /* Post padding */
|
||||
#define J_OPTION_MASK 0x1000 /* JTAG Enabled */
|
||||
#define B_OPTION_MASK 0x2000 /* Box ID */
|
||||
#define Z_OPTION_MASK 0x4000 /* secure boot mode - KAK private key */
|
||||
#define F_OPTION_MASK 0x8000 /* Flash ID */
|
||||
#define A_OPTION_MASK 0x10000 /* secure boot mode - CSK private key */
|
||||
#define G_OPTION_MASK 0x20000 /* binary file */
|
||||
#define K_OPTION_MASK 0x40000 /* secure boot mode - CSK private key index */
|
||||
#define L_OPTION_MASK 0x80000 /* NAND block size (in 64K chunks) */
|
||||
#define N_OPTION_MASK 0x100000 /* NAND cell technology MLC/SLC */
|
||||
#define p_OPTION_MASK 0x200000 /* Print enable */
|
||||
#define b_OPTION_MASK 0x400000 /* Baudrate */
|
||||
#define u_OPTION_MASK 0x800000 /* debug serial port number */
|
||||
#define m_OPTION_MASK 0x1000000 /* debug serial port MPP configuration */
|
||||
|
||||
#ifndef O_BINARY /* should be defined on __WIN32__ */
|
||||
#define O_BINARY 0
|
||||
#endif
|
||||
|
||||
#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
|
||||
|
||||
typedef enum {
|
||||
IMG_SATA,
|
||||
IMG_UART,
|
||||
IMG_FLASH,
|
||||
IMG_MMC,
|
||||
IMG_BOOTROM,
|
||||
IMG_NAND,
|
||||
IMG_HEX,
|
||||
IMG_BIN,
|
||||
IMG_PEX,
|
||||
IMG_I2C
|
||||
|
||||
} IMG_TYPE;
|
||||
|
||||
#define REGULAR_IMAGE(opt) \
|
||||
(((opt)->image_type != IMG_BOOTROM) && \
|
||||
((opt)->image_type != IMG_HEX) && ((opt)->image_type != IMG_BIN))
|
||||
|
||||
typedef struct {
|
||||
IMG_TYPE img_type; /* image type */
|
||||
char *img_name; /* image name string */
|
||||
unsigned int img_opt; /* mandatory options for this image type */
|
||||
|
||||
} IMG_MAP;
|
||||
|
||||
typedef enum {
|
||||
IMG_FILE_INDX = 1,
|
||||
HDR_FILE_INDX = 2
|
||||
|
||||
} FILE_IDX;
|
||||
|
||||
typedef enum {
|
||||
HDR_IMG_ONE_FILE = 1, /* Create one file with header and image */
|
||||
HDR_IMG_TWO_FILES = 2, /* Create separate header and image files */
|
||||
HDR_ONLY = 3, /* Create only header */
|
||||
IMG_ONLY = 4, /* Create only image */
|
||||
|
||||
} HEADER_MODE;
|
||||
|
||||
typedef struct {
|
||||
IMG_TYPE image_type;
|
||||
char *fname_dram; /* DRAM init file for "register" header */
|
||||
char *fname_twsi; /* TWSI serial init file */
|
||||
char *fname_bin; /* binary code file for "binary" header */
|
||||
char *fname_prkey; /* KAK RSA Private key file */
|
||||
char *fname_prkeyCsk; /* CSK RSA Private key file */
|
||||
char *fname_list; /* headers definition file */
|
||||
u32 flags; /* user-defined flags */
|
||||
u32 req_flags; /* mandatory flags */
|
||||
u32 image_source; /* starting sector */
|
||||
u32 image_dest; /* image destination */
|
||||
u32 image_exec; /* image execution */
|
||||
unsigned int hex_width; /* HEX file width */
|
||||
unsigned int header_mode; /* Header file mode */
|
||||
int csk_index;
|
||||
int pre_padding;
|
||||
int post_padding;
|
||||
int prepadding_size;
|
||||
int postpadding_size;
|
||||
unsigned int bytesToAlign;
|
||||
unsigned int nandPageSize;
|
||||
unsigned int nandBlkSize;
|
||||
char nandCellTech;
|
||||
u32 boxId;
|
||||
u32 flashId;
|
||||
u32 jtagDelay;
|
||||
char *image_buf; /* image buffer for image pre-load */
|
||||
u32 image_sz; /* total size of pre-loaded image buffer including
|
||||
paddings */
|
||||
u32 img_gap; /* gap between header and image start point */
|
||||
u32 baudRate; /* debug print port baudrate */
|
||||
u32 debugPortNum; /* debug print port number */
|
||||
u32 debugPortMpp; /* debug print port MPP configuration */
|
||||
union {
|
||||
char *fname_arr[5];
|
||||
struct {
|
||||
char *in;
|
||||
char *out;
|
||||
char *hdr_out;
|
||||
char *romc;
|
||||
char *romd;
|
||||
} fname;
|
||||
};
|
||||
} USER_OPTIONS;
|
||||
|
||||
/* Function declaration */
|
||||
void print_usage(void);
|
||||
|
||||
/* 32 bit checksum */
|
||||
MV_U32 checksum32(void *start, MV_U32 len, MV_U32 csum);
|
||||
MV_U8 checksum8(void *start, MV_U32 len, MV_U8 csum);
|
||||
MV_U32 crc32(MV_U32 crc, volatile MV_U32 *buf, MV_U32 len);
|
||||
|
||||
#endif /* _INC_DOIMAGE_H */
|
||||
Loading…
Reference in New Issue