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AMD S3: Add missing erasing flash sector for saving MTRR register 

It has worked up to now because the region is already erased
the first time the board boots, and every additional boot the
same data is being written over the old data.(by Dave Frodin)

Change-Id: Id334c60668e31d23c1d552d0ace8eb6ae5513e6b
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/2304
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Zheng Bao 2013-02-10 21:20:39 +08:00 committed by Patrick Georgi
parent e07e253bc8
commit c52e1065df
1 changed files with 2 additions and 0 deletions
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src/cpu/amd/agesa/s3_resume.c
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@ -168,6 +168,8 @@ void OemAgesaSaveMtrr(void)
flash->spi->rw = SPI_WRITE_FLAG;
spi_claim_bus(flash->spi);
flash->erase(flash, S3_DATA_MTRR_POS, S3_DATA_MTRR_SIZE);
/* Enable access to AMD RdDram and WrDram extension bits */
msr_data = rdmsr(SYS_CFG);
msr_data.lo |= SYSCFG_MSR_MtrrFixDramModEn;