VIA chipsets: fix compilation without real mode code

The VIA chipsets CX700, VT8623 and VX800 required to be
configured with real mode option rom code enabled. This
patch fixes the issue and drops some unneeded header files.

Change-Id: I0d8a3f8f99c2eacec7666f08f85b99f09c06af84
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1833
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Stefan Reinauer 2012-11-13 12:49:59 -08:00 committed by Ronald G. Minnich
parent 13c2c025a4
commit c5334635ca
9 changed files with 15 additions and 67 deletions

View File

@ -29,7 +29,6 @@
#include <bitops.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include "northbridge.h"
#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>

View File

@ -1,26 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef NORTHBRIDGE_VIA_CX700_H
#define NORTHBRIDGE_VIA_CX700_H
extern unsigned int cx700_scan_root_bus(device_t root, unsigned int max);
extern void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx, u32 edx,
u32 esi, u32 edi) __attribute__((regparm(0)));
#endif /* NORTHBRIDGE_VIA_CX700_H */

View File

@ -31,7 +31,9 @@
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
#include "registers.h"
#include "northbridge.h"
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
#include <devices/oprom/x86.h>
#endif
/* PCI Domain 1 Device 0 Function 0 */
@ -145,6 +147,7 @@ static void write_protect_vgabios(void)
static void vga_enable_console(void)
{
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
/* Call VGA BIOS int10 function 0x4f14 to enable main console
* Epia-M does not always autosense the main console so forcing
* it on is good.
@ -152,6 +155,7 @@ static void vga_enable_console(void)
/* int#, EAX, EBX, ECX, EDX, ESI, EDI */
realmode_interrupt(0x10, 0x4f14, 0x8003, 0x0001, 0x0000, 0x0000, 0x0000);
#endif
}
static void vga_init(device_t dev)

View File

@ -11,7 +11,6 @@
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include "northbridge.h"
/*
* This fixup is based on capturing values from an Award BIOS. Without

View File

@ -1,8 +0,0 @@
#ifndef NORTHBRIDGE_VIA_VT8623_H
#define NORTHBRIDGE_VIA_VT8623_H
unsigned int vt8623_scan_root_bus(device_t root, unsigned int max);
extern void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx, u32 edx,
u32 esi, u32 edi) __attribute__((regparm(0)));
#endif /* NORTHBRIDGE_VIA_VT8623_H */

View File

@ -30,7 +30,9 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
#include "northbridge.h"
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
#include <devices/oprom/x86.h>
#endif
static int via_vt8623_int15_handler(struct eregs *regs)
{
@ -99,6 +101,7 @@ static void vga_random_fixup(device_t dev)
static void vga_enable_console(void)
{
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
/* Call VGA BIOS int10 function 0x4f14 to enable main console
* Epia-M does not always autosense the main console so forcing
* it on is good.
@ -106,6 +109,7 @@ static void vga_enable_console(void)
/* int#, EAX, EBX, ECX, EDX, ESI, EDI */
realmode_interrupt(0x10, 0x4f14, 0x8003, 0x0001, 0x0000, 0x0000, 0x0000);
#endif
}
static void vga_init(device_t dev)

View File

@ -31,7 +31,6 @@
#include <string.h>
#include <bitops.h>
#include <cpu/cpu.h>
#include "northbridge.h"
#include "vx800.h"
/* !!FIXME!! This was meant to be a CONFIG option */

View File

@ -1,27 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 One Laptop per Child, Association, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef NORTHBRIDGE_VIA_VX800_H
#define NORTHBRIDGE_VIA_VX800_H
extern unsigned int vx800_scan_root_bus(device_t root, unsigned int max);
extern void (*realmode_interrupt)(u32 intno, u32 eax, u32 ebx, u32 ecx, u32 edx,
u32 esi, u32 edi) __attribute__((regparm(0)));
#endif /* NORTHBRIDGE_VIA_VX800_H */

View File

@ -33,7 +33,9 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <arch/interrupt.h>
#include "northbridge.h"
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
#include <devices/oprom/x86.h>
#endif
/* PCI Domain 1 Device 0 Function 0 */
@ -145,6 +147,7 @@ static void write_protect_vgabios(void)
static void vga_enable_console(void)
{
#if CONFIG_PCI_OPTION_ROM_RUN_REALMODE
/* Call VGA BIOS int10 function 0x4f14 to enable main console
* Epia-M does not always autosense the main console so forcing
* it on is good.
@ -152,6 +155,7 @@ static void vga_enable_console(void)
/* int#, EAX, EBX, ECX, EDX, ESI, EDI */
realmode_interrupt(0x10, 0x4f14, 0x8003, 0x0001, 0x0000, 0x0000, 0x0000);
#endif
}
extern u8 acpi_sleep_type;