veyron_{brain,danger,mickey,romy}: Select PHYSICAL_REC_SWITCH

BUG=chrome-os-partner:42220
BRANCH=veyron
TEST=Used physical recovery button to enter dev mode on mickey

Change-Id: I78332f516b042be9c0cef6d8a59af44b670fc260
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4fcd79a133dc750dffd5d23e0b84a109e7b7cb8d
Original-Change-Id: I8d8dc0c0b98bbd194095d47047c8c5199ce17769
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/283546
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10844
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
David Hendricks 2015-07-06 16:52:11 -07:00 committed by Patrick Georgi
parent 9761a7a295
commit c55d839000
4 changed files with 4 additions and 0 deletions

View File

@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_HARD_RESET
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
select PHYSICAL_REC_SWITCH
select RAM_CODE_SUPPORT
select SOC_ROCKCHIP_RK3288
select SPI_FLASH

View File

@ -28,6 +28,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_HARD_RESET
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
select PHYSICAL_REC_SWITCH
select RAM_CODE_SUPPORT
select SOC_ROCKCHIP_RK3288
select SPI_FLASH

View File

@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_HARD_RESET
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
select PHYSICAL_REC_SWITCH
select RAM_CODE_SUPPORT
select SOC_ROCKCHIP_RK3288
select SPI_FLASH

View File

@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_HARD_RESET
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
select PHYSICAL_REC_SWITCH
select RAM_CODE_SUPPORT
select SOC_ROCKCHIP_RK3288
select SPI_FLASH