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soc/intel/car/cache_as_ram.S: Fix typo in comment 

Change-Id: Ia91dbda44f60388324cf58dbccdbd2172dbff21d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55561
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2021-06-16 09:56:26 +02:00 committed by Werner Zeh
parent 0faba3cf23
commit c57d303f9c
1 changed files with 1 additions and 1 deletions
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src/soc/intel/common/block/cpu/car/cache_as_ram.S
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@ -36,7 +36,7 @@ clear_fixed_mtrr:
post_code(0x22) post_code(0x22)
/* Figure put how many MTRRs we have, and clear them out */ /* Figure out how many MTRRs we have, and clear them out */
mov $MTRR_CAP_MSR, %ecx mov $MTRR_CAP_MSR, %ecx
rdmsr rdmsr
movzb %al, %ebx /* Number of variable MTRRs */ movzb %al, %ebx /* Number of variable MTRRs */