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soc/intel/common: Add Crash Log and PMC SRAM PCI device IDs 

Add Alder Lake and Tiger Lake specific Crash Log and PMC SRAM device
IDs.

Document Number: 619501, 645548

Change-Id: I64b58b8c345bd54774c4dab7b65258714cd8dc9e
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57787
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Tim Wawrzynczak 2021-09-20 13:41:49 -06:00 committed by Felix Held
parent 9048043302
commit c585d8c96c
2 changed files with 12 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/include/device/pci_ids.h
View File

@ -4112,13 +4112,9 @@
#define PCI_DEVICE_ID_INTEL_ICL_SRAM 0x34ef #define PCI_DEVICE_ID_INTEL_ICL_SRAM 0x34ef
#define PCI_DEVICE_ID_INTEL_CMP_SRAM 0x02ef #define PCI_DEVICE_ID_INTEL_CMP_SRAM 0x02ef
#define PCI_DEVICE_ID_INTEL_CMP_H_SRAM 0x06ef #define PCI_DEVICE_ID_INTEL_CMP_H_SRAM 0x06ef
#define PCI_DEVICE_ID_INTEL_TGL_SRAM 0xa0ef
#define PCI_DEVICE_ID_INTEL_TGL_H_SRAM 0x43ef #define PCI_DEVICE_ID_INTEL_TGL_H_SRAM 0x43ef
#define PCI_DEVICE_ID_INTEL_MCC_SRAM 0x4b7f #define PCI_DEVICE_ID_INTEL_MCC_SRAM 0x4b7f
#define PCI_DEVICE_ID_INTEL_JSP_SRAM 0x4def #define PCI_DEVICE_ID_INTEL_JSP_SRAM 0x4def
#define PCI_DEVICE_ID_INTEL_ADP_P_SRAM 0x7a6f
#define PCI_DEVICE_ID_INTEL_ADP_S_SRAM 0x7aa7
#define PCI_DEVICE_ID_INTEL_ADP_M_SRAM 0x54ef
/* Intel AUDIO device Ids */ /* Intel AUDIO device Ids */
#define PCI_DEVICE_ID_INTEL_LPT_H_AUDIO 0x8c20 #define PCI_DEVICE_ID_INTEL_LPT_H_AUDIO 0x8c20
@ -4334,6 +4330,14 @@
#define PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_2 0x54f2 #define PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_2 0x54f2
#define PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_3 0x54f3 #define PCI_DEVICE_ID_INTEL_ADL_N_CNVI_WIFI_3 0x54f3
/* Intel Crashlog */
#define PCI_DEVICE_ID_INTEL_TGL_CPU_CRASHLOG_SRAM 0x9a0d
#define PCI_DEVICE_ID_INTEL_ADL_CPU_CRASHLOG_SRAM 0x467d
#define PCI_DEVICE_ID_INTEL_ADP_S_PMC_CRASHLOG_SRAM 0x7aa7
#define PCI_DEVICE_ID_INTEL_ADP_P_PMC_CRASHLOG_SRAM 0x51ef
#define PCI_DEVICE_ID_INTEL_ADP_N_PMC_CRASHLOG_SRAM 0x54ef
#define PCI_DEVICE_ID_INTEL_TGP_PMC_CRASHLOG_SRAM 0xa0ef
#define PCI_VENDOR_ID_COMPUTONE 0x8e0e #define PCI_VENDOR_ID_COMPUTONE 0x8e0e
#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 #define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291
#define PCI_DEVICE_ID_COMPUTONE_PG 0x0302 #define PCI_DEVICE_ID_COMPUTONE_PG 0x0302

8
src/soc/intel/common/block/sram/sram.c
View File

@ -38,13 +38,13 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_ICL_SRAM, PCI_DEVICE_ID_INTEL_ICL_SRAM,
PCI_DEVICE_ID_INTEL_CMP_SRAM, PCI_DEVICE_ID_INTEL_CMP_SRAM,
PCI_DEVICE_ID_INTEL_CMP_H_SRAM, PCI_DEVICE_ID_INTEL_CMP_H_SRAM,
PCI_DEVICE_ID_INTEL_TGL_SRAM, PCI_DEVICE_ID_INTEL_TGP_PMC_CRASHLOG_SRAM,
PCI_DEVICE_ID_INTEL_TGL_H_SRAM, PCI_DEVICE_ID_INTEL_TGL_H_SRAM,
PCI_DEVICE_ID_INTEL_MCC_SRAM, PCI_DEVICE_ID_INTEL_MCC_SRAM,
PCI_DEVICE_ID_INTEL_JSP_SRAM, PCI_DEVICE_ID_INTEL_JSP_SRAM,
PCI_DEVICE_ID_INTEL_ADP_P_SRAM, PCI_DEVICE_ID_INTEL_ADP_S_PMC_CRASHLOG_SRAM,
PCI_DEVICE_ID_INTEL_ADP_S_SRAM, PCI_DEVICE_ID_INTEL_ADP_P_PMC_CRASHLOG_SRAM,
PCI_DEVICE_ID_INTEL_ADP_M_SRAM, PCI_DEVICE_ID_INTEL_ADP_N_PMC_CRASHLOG_SRAM,
0, 0,
}; };