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Indent model_fxx_init and model_10xx_init. 

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2010-04-09 04:01:55 +00:00
parent ae60855f91
commit c58f1d1df6
2 changed files with 176 additions and 179 deletions
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5
src/cpu/amd/model_10xxx/model_10xxx_init.c
View File

@ -52,7 +52,6 @@ msr_t rdmsr_amd(u32 index)
return result; return result;
} }
void wrmsr_amd(u32 index, msr_t msr) void wrmsr_amd(u32 index, msr_t msr)
{ {
__asm__ __volatile__( __asm__ __volatile__(
@ -62,7 +61,6 @@ void wrmsr_amd(u32 index, msr_t msr)
); );
} }
static void model_10xxx_init(device_t dev) static void model_10xxx_init(device_t dev)
{ {
u8 i; u8 i;
@ -89,7 +87,6 @@ static void model_10xxx_init(device_t dev)
wrmsr(MCI_STATUS + (i * 4), msr); wrmsr(MCI_STATUS + (i * 4), msr);
} }
enable_cache(); enable_cache();
/* Enable the local cpu apics */ /* Enable the local cpu apics */
@ -128,6 +125,7 @@ static void model_10xxx_init(device_t dev)
static struct device_operations cpu_dev_ops = { static struct device_operations cpu_dev_ops = {
.init = model_10xxx_init, .init = model_10xxx_init,
}; };
static struct cpu_device_id cpu_table[] = { static struct cpu_device_id cpu_table[] = {
//AMD_GH_SUPPORT //AMD_GH_SUPPORT
{ X86_VENDOR_AMD, 0x100f00 }, /* SH-F0 L1 */ { X86_VENDOR_AMD, 0x100f00 }, /* SH-F0 L1 */
@ -144,6 +142,7 @@ static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_AMD, 0x100F80 }, /* HY-D0 */ { X86_VENDOR_AMD, 0x100F80 }, /* HY-D0 */
{ 0, 0 }, { 0, 0 },
}; };
static const struct cpu_driver model_10xxx __cpu_driver = { static const struct cpu_driver model_10xxx __cpu_driver = {
.ops = &cpu_dev_ops, .ops = &cpu_dev_ops,
.id_table = cpu_table, .id_table = cpu_table,

56
src/cpu/amd/model_fxx/model_fxx_init.c
View File

@ -53,7 +53,8 @@ int is_e0_later_in_bsp(int nodeid)
// d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0 // d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0
device_t dev; device_t dev;
dev = dev_find_slot(0, PCI_DEVFN(0x18 + nodeid, 2)); dev = dev_find_slot(0, PCI_DEVFN(0x18 + nodeid, 2));
if(!dev) return 0; if (!dev)
return 0;
val_old = pci_read_config32(dev, 0x80); val_old = pci_read_config32(dev, 0x80);
val = val_old; val = val_old;
val |= (1 << 3); val |= (1 << 3);
@ -81,7 +82,7 @@ int is_cpu_f0_in_bsp(int nodeid)
#define MCI_STATUS 0x401 #define MCI_STATUS 0x401
static inline msr_t rdmsr_amd(unsigned index) static inline msr_t rdmsr_amd(u32 index)
{ {
msr_t result; msr_t result;
__asm__ __volatile__( __asm__ __volatile__(
@ -92,7 +93,7 @@ static inline msr_t rdmsr_amd(unsigned index)
return result; return result;
} }
static inline void wrmsr_amd(unsigned index, msr_t msr) static inline void wrmsr_amd(u32 index, msr_t msr)
{ {
__asm__ __volatile__( __asm__ __volatile__(
"wrmsr" "wrmsr"
@ -101,7 +102,6 @@ static inline void wrmsr_amd(unsigned index, msr_t msr)
); );
} }
#define MTRR_COUNT 8 #define MTRR_COUNT 8
#define ZERO_CHUNK_KB 0x800UL /* 2M */ #define ZERO_CHUNK_KB 0x800UL /* 2M */
#define TOLM_KB 0x400000UL #define TOLM_KB 0x400000UL
@ -144,7 +144,6 @@ static void restore_mtrr_state(struct mtrr_state *state)
enable_cache(); enable_cache();
} }
#if 0 #if 0
static void print_mtrr_state(struct mtrr_state *state) static void print_mtrr_state(struct mtrr_state *state)
{ {
@ -199,7 +198,8 @@ static void set_init_ecc_mtrrs(void)
enable_cache(); enable_cache();
} }
static inline void clear_2M_ram(unsigned long basek, struct mtrr_state *mtrr_state) static inline void clear_2M_ram(unsigned long basek,
struct mtrr_state *mtrr_state)
{ {
unsigned long limitk; unsigned long limitk;
unsigned long size; unsigned long size;
@ -271,14 +271,15 @@ static void init_ecc_memory(unsigned node_id)
/* Enable cache scrubbing at the lowest possible rate */ /* Enable cache scrubbing at the lowest possible rate */
if (enable_scrubbing) { if (enable_scrubbing) {
pci_write_config32(f3_dev, SCRUB_CONTROL, pci_write_config32(f3_dev, SCRUB_CONTROL,
(SCRUB_84ms << 16) | (SCRUB_84ms << 8) | (SCRUB_NONE << 0)); (SCRUB_84ms << 16) | (SCRUB_84ms << 8) |
(SCRUB_NONE << 0));
} else { } else {
pci_write_config32(f3_dev, SCRUB_CONTROL, pci_write_config32(f3_dev, SCRUB_CONTROL,
(SCRUB_NONE << 16) | (SCRUB_NONE << 8) | (SCRUB_NONE << 0)); (SCRUB_NONE << 16) | (SCRUB_NONE << 8) |
(SCRUB_NONE << 0));
printk(BIOS_DEBUG, "Scrubbing Disabled\n"); printk(BIOS_DEBUG, "Scrubbing Disabled\n");
} }
/* If ecc support is not enabled don't touch memory */ /* If ecc support is not enabled don't touch memory */
dcl = pci_read_config32(f2_dev, DRAM_CONFIG_LOW); dcl = pci_read_config32(f2_dev, DRAM_CONFIG_LOW);
if (!(dcl & DCL_DimmEccEn)) { if (!(dcl & DCL_DimmEccEn)) {
@ -286,15 +287,17 @@ static void init_ecc_memory(unsigned node_id)
return; return;
} }
startk = (pci_read_config32(f1_dev, 0x40 + (node_id*8)) & 0xffff0000) >> 2; startk =
endk = ((pci_read_config32(f1_dev, 0x44 + (node_id*8)) & 0xffff0000) >> 2) + 0x4000; (pci_read_config32(f1_dev, 0x40 + (node_id * 8)) & 0xffff0000) >> 2;
endk =
((pci_read_config32(f1_dev, 0x44 + (node_id * 8)) & 0xffff0000) >>
2) + 0x4000;
#if CONFIG_HW_MEM_HOLE_SIZEK != 0 #if CONFIG_HW_MEM_HOLE_SIZEK != 0
unsigned long hole_startk = 0; unsigned long hole_startk = 0;
#if CONFIG_K8_REV_F_SUPPORT == 0 #if CONFIG_K8_REV_F_SUPPORT == 0
if (!is_cpu_pre_e0()) if (!is_cpu_pre_e0()) {
{
#endif #endif
uint32_t val; uint32_t val;
@ -307,7 +310,6 @@ static void init_ecc_memory(unsigned node_id)
#endif #endif
#endif #endif
/* Don't start too early */ /* Don't start too early */
begink = startk; begink = startk;
if (begink < (CONFIG_RAMTOP >> 10)) { if (begink < (CONFIG_RAMTOP >> 10)) {
@ -326,27 +328,23 @@ static void init_ecc_memory(unsigned node_id)
/* Walk through 2M chunks and zero them */ /* Walk through 2M chunks and zero them */
#if CONFIG_HW_MEM_HOLE_SIZEK != 0 #if CONFIG_HW_MEM_HOLE_SIZEK != 0
/* here hole_startk can not be equal to begink, never. Also hole_startk is in 2M boundary, 64M? */ /* here hole_startk can not be equal to begink, never. Also hole_startk is in 2M boundary, 64M? */
if ( (hole_startk != 0) && ((begink < hole_startk) && (endk>(4*1024*1024)))) { if ((hole_startk != 0)
&& ((begink < hole_startk) && (endk > (4 * 1024 * 1024)))) {
for (basek = begink; basek < hole_startk; for (basek = begink; basek < hole_startk;
basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1))) basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1))) {
{
clear_2M_ram(basek, &mtrr_state); clear_2M_ram(basek, &mtrr_state);
} }
for (basek = 4 * 1024 * 1024; basek < endk; for (basek = 4 * 1024 * 1024; basek < endk;
basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1))) basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1))) {
{
clear_2M_ram(basek, &mtrr_state); clear_2M_ram(basek, &mtrr_state);
} }
} } else
else
#endif #endif
for (basek = begink; basek < endk; for (basek = begink; basek < endk;
basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1))) basek = ((basek + ZERO_CHUNK_KB) & ~(ZERO_CHUNK_KB - 1))) {
{
clear_2M_ram(basek, &mtrr_state); clear_2M_ram(basek, &mtrr_state);
} }
/* Restore the normal state */ /* Restore the normal state */
map_2M_page(0); map_2M_page(0);
restore_mtrr_state(&mtrr_state); restore_mtrr_state(&mtrr_state);
@ -360,13 +358,13 @@ static void init_ecc_memory(unsigned node_id)
if (enable_scrubbing) { if (enable_scrubbing) {
/* Enable scrubbing at the lowest possible rate */ /* Enable scrubbing at the lowest possible rate */
pci_write_config32(f3_dev, SCRUB_CONTROL, pci_write_config32(f3_dev, SCRUB_CONTROL,
(SCRUB_84ms << 16) | (SCRUB_84ms << 8) | (SCRUB_84ms << 0)); (SCRUB_84ms << 16) | (SCRUB_84ms << 8) |
(SCRUB_84ms << 0));
} }
printk(BIOS_DEBUG, " done\n"); printk(BIOS_DEBUG, " done\n");
} }
static inline void k8_errata(void) static inline void k8_errata(void)
{ {
msr_t msr; msr_t msr;
@ -474,7 +472,7 @@ static void model_fxx_init(device_t dev)
msr_t msr; msr_t msr;
struct node_core_id id; struct node_core_id id;
#if CONFIG_LOGICAL_CPUS == 1 #if CONFIG_LOGICAL_CPUS == 1
unsigned siblings; u32 siblings;
#endif #endif
#if CONFIG_K8_REV_F_SUPPORT == 1 #if CONFIG_K8_REV_F_SUPPORT == 1
@ -541,7 +539,6 @@ static void model_fxx_init(device_t dev)
msr.hi |= 1 << (33 - 32); msr.hi |= 1 << (33 - 32);
wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr); wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr);
} }
#endif #endif
id = get_node_core_id(read_nb_cfg_54()); // pre e0 nb_cfg_54 can not be set id = get_node_core_id(read_nb_cfg_54()); // pre e0 nb_cfg_54 can not be set
@ -549,7 +546,8 @@ static void model_fxx_init(device_t dev)
/* Is this a bad location? In particular can another node prefecth /* Is this a bad location? In particular can another node prefecth
* data from this node before we have initialized it? * data from this node before we have initialized it?
*/ */
if (id.coreid == 0) init_ecc_memory(id.nodeid); // only do it for core 0 if (id.coreid == 0)
init_ecc_memory(id.nodeid); // only do it for core 0
#if CONFIG_LOGICAL_CPUS==1 #if CONFIG_LOGICAL_CPUS==1
/* Start up my cpu siblings */ /* Start up my cpu siblings */