soc/mediatek/mt8186: Fix issue of clearing watchdog status
The implementation of clearing watchdog status is wrong in CB:58835. The value written to the 'wdt_mode' register should be 'wdt_mode | 0x22000000' instead of 'wdt_status | 0x22000000'. BUG=b:204229208 TEST=check watchdog status is cleared. Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I8c5dbaab2ac43d3867037bc4160aa5af2d79284f Reviewed-on: https://review.coreboot.org/c/coreboot/+/61446 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -39,6 +39,6 @@ enum {
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static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE;
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static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE;
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int mtk_wdt_init(void);
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int mtk_wdt_init(void);
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void mtk_wdt_clr_status(uint32_t wdt_sta);
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void mtk_wdt_clr_status(void);
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#endif /* SOC_MEDIATEK_COMMON_WDT_H */
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#endif /* SOC_MEDIATEK_COMMON_WDT_H */
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@ -6,7 +6,7 @@
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#include <soc/wdt.h>
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#include <soc/wdt.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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__weak void mtk_wdt_clr_status(uint32_t wdt_sta) { /* do nothing */ }
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__weak void mtk_wdt_clr_status(void) { /* do nothing */ }
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int mtk_wdt_init(void)
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int mtk_wdt_init(void)
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{
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{
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@ -15,7 +15,7 @@ int mtk_wdt_init(void)
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/* Writing mode register will clear status register */
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/* Writing mode register will clear status register */
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wdt_sta = read32(&mtk_wdt->wdt_status);
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wdt_sta = read32(&mtk_wdt->wdt_status);
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mtk_wdt_clr_status(wdt_sta);
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mtk_wdt_clr_status();
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printk(BIOS_INFO, "WDT: Status = %#x\n", wdt_sta);
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printk(BIOS_INFO, "WDT: Status = %#x\n", wdt_sta);
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@ -9,9 +9,12 @@
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#include <soc/addressmap.h>
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#include <soc/addressmap.h>
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#include <soc/wdt.h>
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#include <soc/wdt.h>
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#define MTK_WDT_CLR_STATUS 0x22000000
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#define MTK_WDT_CLR_STATUS_VAL 0x22
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void mtk_wdt_clr_status(uint32_t wdt_sta)
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DEFINE_BITFIELD(MTK_WDT_CLR_STATUS, 31, 24)
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void mtk_wdt_clr_status(void)
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{
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{
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write32(&mtk_wdt->wdt_mode, wdt_sta | MTK_WDT_CLR_STATUS);
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SET32_BITFIELDS(&mtk_wdt->wdt_mode,
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MTK_WDT_CLR_STATUS, MTK_WDT_CLR_STATUS_VAL);
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}
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}
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@ -6,7 +6,7 @@
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#define MTK_WDT_CLR_STATUS 0x230001FF
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#define MTK_WDT_CLR_STATUS 0x230001FF
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void mtk_wdt_clr_status(uint32_t wdt_sta)
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void mtk_wdt_clr_status(void)
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{
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{
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write32(&mtk_wdt->wdt_mode, MTK_WDT_CLR_STATUS);
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write32(&mtk_wdt->wdt_mode, MTK_WDT_CLR_STATUS);
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}
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}
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