siemens/sitemp_g1p1: Get rid of bus_isa and bus_type
Each variable is essentially unused or incorrect. Change-Id: I4d2a10c9b45306ac6e6026a31765d3b912fd855c Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/242 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
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@ -32,7 +32,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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* and acpi_tables busnum is default.
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*/
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*/
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u8 bus_isa;
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u8 bus_rs690[8];
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u8 bus_rs690[8];
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u8 bus_sb600[2];
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u8 bus_sb600[2];
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u32 apicid_sb600;
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u32 apicid_sb600;
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@ -54,8 +53,6 @@ u32 hcdnx[] = {
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0x20202020,
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0x20202020,
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};
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};
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u32 bus_type[256];
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u32 sbdn_rs690;
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u32 sbdn_rs690;
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u32 sbdn_sb600;
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u32 sbdn_sb600;
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@ -67,7 +64,7 @@ void get_bus_conf(void)
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{
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{
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u32 apicid_base;
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u32 apicid_base;
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device_t dev;
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device_t dev;
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int i, j;
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int i;
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if (get_bus_conf_done == 1)
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if (get_bus_conf_done == 1)
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return; /* do it only once */
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return; /* do it only once */
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@ -92,25 +89,13 @@ void get_bus_conf(void)
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bus_rs690[i] = 0;
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bus_rs690[i] = 0;
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}
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}
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for (i = 0; i < 256; i++) {
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bus_type[i] = 0; /* default ISA bus. */
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}
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bus_type[0] = 1; /* pci */
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bus_rs690[0] = (sysconf.pci1234[0] >> 16) & 0xff;
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bus_rs690[0] = (sysconf.pci1234[0] >> 16) & 0xff;
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bus_sb600[0] = bus_rs690[0];
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bus_sb600[0] = bus_rs690[0];
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bus_type[bus_rs690[0]] = 1;
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/* sb600 */
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/* sb600 */
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dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 4));
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dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 4));
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if (dev) {
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if (dev) {
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bus_sb600[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_sb600[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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for (j = bus_sb600[1]; j < bus_isa; j++)
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bus_type[j] = 1;
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}
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}
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/* rs690 */
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/* rs690 */
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@ -118,16 +103,10 @@ void get_bus_conf(void)
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dev = dev_find_slot(bus_rs690[0], PCI_DEVFN(sbdn_rs690 + i, 0));
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dev = dev_find_slot(bus_rs690[0], PCI_DEVFN(sbdn_rs690 + i, 0));
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if (dev) {
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if (dev) {
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bus_rs690[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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bus_rs690[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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if(255 != bus_rs690[i]) {
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bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
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bus_isa++;
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bus_type[bus_rs690[i]] = 1; /* PCI bus. */
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}
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}
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}
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}
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}
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/* I/O APICs: APIC ID Version State Address */
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/* I/O APICs: APIC ID Version State Address */
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bus_isa = 10;
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#if CONFIG_LOGICAL_CPUS==1
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#if CONFIG_LOGICAL_CPUS==1
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apicid_base = get_apicid_base(1);
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apicid_base = get_apicid_base(1);
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#else
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#else
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@ -68,7 +68,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->slot = slot;
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pirq_info->slot = slot;
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pirq_info->rfu = rfu;
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pirq_info->rfu = rfu;
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}
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}
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extern u8 bus_isa;
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extern u8 bus_rs690[8];
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extern u8 bus_rs690[8];
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extern u8 bus_sb600[2];
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extern u8 bus_sb600[2];
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extern unsigned long sbdn_sb600;
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extern unsigned long sbdn_sb600;
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@ -26,13 +26,11 @@
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#include <cpu/amd/amdk8_sysconf.h>
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#include <cpu/amd/amdk8_sysconf.h>
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extern u8 bus_isa;
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extern u8 bus_rs690[8];
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extern u8 bus_rs690[8];
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extern u8 bus_sb600[2];
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extern u8 bus_sb600[2];
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extern u32 apicid_sb600;
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extern u32 apicid_sb600;
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extern u32 bus_type[256];
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extern u32 sbdn_rs690;
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extern u32 sbdn_rs690;
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extern u32 sbdn_sb600;
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extern u32 sbdn_sb600;
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@ -46,12 +44,9 @@ static void *smp_write_config_table(void *v)
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smp_write_processors(mc);
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smp_write_processors(mc);
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get_bus_conf();
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get_bus_conf();
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printk(BIOS_DEBUG, "%s: bus_isa=%d, apic_id=0x%x\n", __func__, bus_isa, apicid_sb600);
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printk(BIOS_DEBUG, "%s: apic_id=0x%x\n", __func__, apicid_sb600);
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mptable_write_buses(mc, NULL, &isa_bus);
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mptable_write_buses(mc, NULL, &isa_bus);
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if (isa_bus != bus_isa) {
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printk(BIOS_ERR, "ISA bus numbering schemes differ! Please fix mptable.c\n");
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}
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/* I/O APICs: APIC ID Version State Address */
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/* I/O APICs: APIC ID Version State Address */
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{
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{
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device_t dev;
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device_t dev;
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@ -63,9 +58,10 @@ static void *smp_write_config_table(void *v)
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smp_write_ioapic(mc, apicid_sb600, 0x20, res->base);
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smp_write_ioapic(mc, apicid_sb600, 0x20, res->base);
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}
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}
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}
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}
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mptable_add_isa_interrupts(mc, bus_isa, apicid_sb600, 0);
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mptable_add_isa_interrupts(mc, isa_bus, apicid_sb600, 0);
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/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
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mptable_lintsrc(mc, bus_isa);
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mptable_lintsrc(mc, isa_bus);
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/* Compute the checksums */
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/* Compute the checksums */
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return mptable_finalize(mc);
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return mptable_finalize(mc);
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