mainboard/lenovo/g505s/buildOpts.c: Trivial variable rename
Minor fix to avoid confusion, nothing to see here. Change-Id: I89d56a91d2df049e85cf49c23218620caba84880 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7654 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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@ -385,7 +385,7 @@ GPIO_CONTROL lenovo_g505s_gpio[] = {
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#define SCI_MAP_XHCI_10_0 0x78
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#define SCI_MAP_XHCI_10_0 0x78
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#define SCI_MAP_PWRBTN 0x73
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#define SCI_MAP_PWRBTN 0x73
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SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
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SCI_MAP_CONTROL lenovo_g505s_sci_map[] = {
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{GEVENT_PIN( EC_SCI_GEVENT ), EC_SCI_GPE},
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{GEVENT_PIN( EC_SCI_GEVENT ), EC_SCI_GPE},
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{GEVENT_PIN( EC_LID_GEVENT ), EC_LID_GPE},
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{GEVENT_PIN( EC_LID_GEVENT ), EC_LID_GPE},
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{GEVENT_PIN( PCIE_GEVENT ), PCIE_GPE},
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{GEVENT_PIN( PCIE_GEVENT ), PCIE_GPE},
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@ -394,7 +394,7 @@ SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
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{SCI_MAP_XHCI_10_0, PME_GPE},
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{SCI_MAP_XHCI_10_0, PME_GPE},
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{SCI_MAP_PWRBTN, PME_GPE},
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{SCI_MAP_PWRBTN, PME_GPE},
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};
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};
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#define BLDCFG_FCH_SCI_MAP_LIST (&m6_1035dx_sci_map[0])
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#define BLDCFG_FCH_SCI_MAP_LIST (&lenovo_g505s_sci_map[0])
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// The following definitions specify the default values for various parameters in which there are
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// The following definitions specify the default values for various parameters in which there are
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// no clearly defined defaults to be used in the common file. The values below are based on product
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// no clearly defined defaults to be used in the common file. The values below are based on product
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