soc/intel/meteorlake: Fix PortUsb30Enable configuration

PortUsb30Enable has been overridden unexpectedly, this patch fixed it.

BUG=b:276181378
Test=boot to rex and check USB3 ports are working.

Signed-off-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Change-Id: Ic04b9eb236ed28a76ee516c52fc0c983cb8f2c0e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74143
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Ivy Jian 2023-03-31 17:56:11 +08:00 committed by Subrata Banik
parent 2afac1956f
commit c5c6372395
1 changed files with 0 additions and 1 deletions

View File

@ -487,7 +487,6 @@ static void fill_fsps_xhci_params(FSP_S_CONFIG *s_cfg,
max_port = get_max_tcss_port(); max_port = get_max_tcss_port();
for (i = 0; i < max_port; i++) { for (i = 0; i < max_port; i++) {
s_cfg->PortUsb30Enable[i] = config->tcss_ports[i].enable;
if (config->tcss_ports[i].enable) if (config->tcss_ports[i].enable)
s_cfg->CpuUsb3OverCurrentPin[i] = config->tcss_ports[i].ocpin; s_cfg->CpuUsb3OverCurrentPin[i] = config->tcss_ports[i].ocpin;
} }