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AGESA fam15tn fam16kb 00730f01: Add common agesa_readSpd() 

Remove northbridge specific callouts for AGESA_READ_SPD.

Move low-level SMBus code to southbridge.

Change-Id: I3e272389e2a7db542fb48fca8606325af27b65a5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7112
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
This commit is contained in:
Kyösti Mälkki 2014-10-17 22:33:22 +03:00
parent f5f9e38d12
commit c5cc9f233c
26 changed files with 202 additions and 496 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/amd/olivehill/BiosCallOuts.c
View File

@ -37,8 +37,8 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
{AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
{AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
{AGESA_READ_SPD, fam16kb_ReadSpd },
{AGESA_DO_RESET, agesa_Reset },
{AGESA_READ_SPD, agesa_ReadSpd },
{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },

2
src/mainboard/amd/olivehillplus/BiosCallOuts.c
View File

@ -37,7 +37,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
{AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
{AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
{AGESA_READ_SPD, ReadSpd_00730F01 },
{AGESA_READ_SPD, agesa_ReadSpd },
{AGESA_DO_RESET, agesa_Reset },
{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },

2
src/mainboard/amd/parmer/BiosCallOuts.c
View File

@ -37,8 +37,8 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
{AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
{AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
{AGESA_READ_SPD, fam15tn_ReadSpd },
{AGESA_DO_RESET, agesa_Reset },
{AGESA_READ_SPD, agesa_ReadSpd },
{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },

2
src/mainboard/amd/thatcher/BiosCallOuts.c
View File

@ -37,8 +37,8 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
{AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
{AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
{AGESA_READ_SPD, fam15tn_ReadSpd },
{AGESA_DO_RESET, agesa_Reset },
{AGESA_READ_SPD, agesa_ReadSpd },
{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },

2
src/mainboard/asrock/imb-a180/BiosCallOuts.c
View File

@ -35,8 +35,8 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
{AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
{AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
{AGESA_READ_SPD, fam16kb_ReadSpd },
{AGESA_DO_RESET, agesa_Reset },
{AGESA_READ_SPD, agesa_ReadSpd },
{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },

2
src/mainboard/asus/f2a85-m/BiosCallOuts.c
View File

@ -32,8 +32,8 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
{AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
{AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
{AGESA_READ_SPD, fam15tn_ReadSpd },
{AGESA_DO_RESET, agesa_Reset },
{AGESA_READ_SPD, agesa_ReadSpd },
{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },

2
src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c
View File

@ -33,8 +33,8 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
{AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
{AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
{AGESA_READ_SPD, fam15tn_ReadSpd },
{AGESA_DO_RESET, agesa_Reset },
{AGESA_READ_SPD, agesa_ReadSpd },
{AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
{AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },

1
src/northbridge/amd/agesa/00730F01/Makefile.inc
View File

@ -22,4 +22,3 @@ romstage-y += dimmSpd.c
ramstage-y += northbridge.c
ramstage-y += callouts_for_00730F01.c
ramstage-y += dimmSpd.c

8
src/northbridge/amd/agesa/00730F01/callouts_for_00730F01.c
View File

@ -24,14 +24,6 @@
#include "heapManager.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "dimmSpd.h"
#include "callouts_for_00730F01.h"
#include "northbridge/amd/agesa/def_callouts.h"
AGESA_STATUS ReadSpd_00730F01 (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
AGESA_STATUS Status;
Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
return Status;
}

1
src/northbridge/amd/agesa/00730F01/callouts_for_00730F01.h
View File

@ -23,6 +23,5 @@
#include "Porting.h"
#include "AGESA.h"
AGESA_STATUS ReadSpd_00730F01 (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
#endif /* CALLOUTS_AMD_AGESA_FAM16_0X30_H */

132
src/northbridge/amd/agesa/00730F01/dimmSpd.c
View File

@ -24,132 +24,15 @@
#include "Porting.h"
#include "AGESA.h"
#include "amdlib.h"
#include "dimmSpd.h"
#include "chip.h"
#include "northbridge/amd/agesa/dimmSpd.h"
#define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
/*-----------------------------------------------------------------------------
*
* readSmbusByteData - read a single SPD byte from any offset
*/
static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
{
unsigned int status;
UINT64 limit;
address |= 1; // set read bit
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 1, 0x1F); // clear error status
__outbyte (iobase + 3, offset); // offset in eeprom
__outbyte (iobase + 4, address); // slave address and read bit
__outbyte (iobase + 2, 0x48); // read byte command
// time limit to avoid hanging for unexpected error status (should never happen)
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*-----------------------------------------------------------------------------
*
* readSmbusByte - read a single SPD byte from the default offset
* this function is faster function readSmbusByteData
*/
static int readSmbusByte (int iobase, int address, char *buffer)
{
unsigned int status;
UINT64 limit;
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 2, 0x44); // read command
// time limit to avoid hanging for unexpected error status
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*---------------------------------------------------------------------------
*
* readspd - Read one or more SPD bytes from a DIMM.
* Start with offset zero and read sequentially.
* Optimization relies on autoincrement to avoid
* sending offset for every byte.
* Reads 128 bytes in 7-8 ms at 400 KHz.
*/
static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
{
int index, error;
printk(BIOS_SPEW, "-------------READING SPD-----------\n");
printk(BIOS_SPEW, "iobase: 0x%08X, SmbusSlave: 0x%08X, count: %d\n",
iobase, SmbusSlaveAddress, count);
/* read the first byte using offset zero */
error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0);
if (error) {
printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
return error;
}
/* read the remaining bytes using auto-increment for speed */
for (index = 1; index < count; index++)
{
error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]);
if (error) {
printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
return error;
}
}
printk(BIOS_SPEW, "\n");
printk(BIOS_SPEW, "-------------FINISHED READING SPD-----------\n");
return 0;
}
static void writePmReg (int reg, int data)
{
__outbyte (0xCD6, reg);
__outbyte (0xCD7, data);
}
static void setupFch (int ioBase)
{
writePmReg (0x2D, ioBase >> 8);
writePmReg (0x2C, ioBase | 1);
__outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
}
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{
int spdAddress, ioBase;
int spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_agesa_00730F01_config *config = dev->chip_info;
@ -166,8 +49,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
spdAddress = config->spdAddrLookup
[info->SocketId] [info->MemChannelId] [info->DimmId];
if (spdAddress == 0) return AGESA_ERROR;
ioBase = 0xB00;
setupFch (ioBase);
return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
if (spdAddress == 0)
return AGESA_ERROR;
int err = hudson_readSpd(spdAddress, (void *) info->Buffer, 128);
if (err)
return AGESA_ERROR;
return AGESA_SUCCESS;
}

10
src/northbridge/amd/agesa/def_callouts.c
View File

@ -26,6 +26,7 @@
#include "Ids.h"
#include "agesawrapper.h"
#include "def_callouts.h"
#include "dimmSpd.h"
AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
@ -114,6 +115,15 @@ AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt
/* printk(BIOS_DEBUG, "IMGptr=%x\n", pVbiosImageInfo->ImagePtr); */
return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
}
AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
AGESA_STATUS Status = AGESA_UNSUPPORTED;
#ifdef __PRE_RAM__
Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
#endif
return Status;
}
#endif
AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr)

1
src/northbridge/amd/agesa/def_callouts.h
View File

@ -64,6 +64,7 @@ AGESA_STATUS agesa_Reset (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt);
AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr);

4
src/northbridge/amd/agesa/00730F01/dimmSpd.h → src/northbridge/amd/agesa/dimmSpd.h
View File

@ -23,4 +23,8 @@
AGESA_STATUS
AmdMemoryReadSPD (IN UINT32 Func, IN UINT32 Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
int hudson_readSpd(int spdAddress, char *buf, size_t len);
int smbus_readSpd(int spdAddress, char *buf, size_t len);
#endif

1
src/northbridge/amd/agesa/family15tn/Makefile.inc
View File

@ -23,4 +23,3 @@ romstage-y += dimmSpd.c
ramstage-y += iommu.c
ramstage-y += northbridge.c
ramstage-y += fam15tn_callouts.c
ramstage-y += dimmSpd.c

119
src/northbridge/amd/agesa/family15tn/dimmSpd.c
View File

@ -24,119 +24,15 @@
#include "Porting.h"
#include "AGESA.h"
#include "amdlib.h"
#include "dimmSpd.h"
#include "chip.h"
#include "northbridge/amd/agesa/dimmSpd.h"
#define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
/*-----------------------------------------------------------------------------
*
* readSmbusByteData - read a single SPD byte from any offset
*/
static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
{
unsigned int status;
UINT64 limit;
address |= 1; // set read bit
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 1, 0x1F); // clear error status
__outbyte (iobase + 3, offset); // offset in eeprom
__outbyte (iobase + 4, address); // slave address and read bit
__outbyte (iobase + 2, 0x48); // read byte command
// time limit to avoid hanging for unexpected error status (should never happen)
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*-----------------------------------------------------------------------------
*
* readSmbusByte - read a single SPD byte from the default offset
* this function is faster function readSmbusByteData
*/
static int readSmbusByte (int iobase, int address, char *buffer)
{
unsigned int status;
UINT64 limit;
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 2, 0x44); // read command
// time limit to avoid hanging for unexpected error status
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*---------------------------------------------------------------------------
*
* readspd - Read one or more SPD bytes from a DIMM.
* Start with offset zero and read sequentially.
* Optimization relies on autoincrement to avoid
* sending offset for every byte.
* Reads 128 bytes in 7-8 ms at 400 KHz.
*/
static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
{
int index, error;
/* read the first byte using offset zero */
error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0);
if (error) return error;
/* read the remaining bytes using auto-increment for speed */
for (index = 1; index < count; index++)
{
error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]);
if (error) return error;
}
return 0;
}
static void writePmReg (int reg, int data)
{
__outbyte (0xCD6, reg);
__outbyte (0xCD7, data);
}
static void setupFch (int ioBase)
{
writePmReg (0x2D, ioBase >> 8);
writePmReg (0x2C, ioBase | 1);
__outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
}
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{
int spdAddress, ioBase;
int spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info;
@ -153,8 +49,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
spdAddress = config->spdAddrLookup
[info->SocketId] [info->MemChannelId] [info->DimmId];
if (spdAddress == 0) return AGESA_ERROR;
ioBase = 0xB00;
setupFch (ioBase);
return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
if (spdAddress == 0)
return AGESA_ERROR;
int err = hudson_readSpd(spdAddress, (void *) info->Buffer, 128);
if (err)
return AGESA_ERROR;
return AGESA_SUCCESS;
}

56
src/northbridge/amd/agesa/family15tn/dimmSpd.h
View File

@ -1,56 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*----------------------------------------------------------------------------------------
* M O D U L E S U S E D
*----------------------------------------------------------------------------------------
*/
#ifndef _DIMMSPD_H_
#define _DIMMSPD_H_
/*----------------------------------------------------------------------------------------
* D E F I N I T I O N S A N D M A C R O S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* T Y P E D E F S A N D S T R U C T U R E S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* P R O T O T Y P E S O F L O C A L F U N C T I O N S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* E X P O R T E D F U N C T I O N S
*----------------------------------------------------------------------------------------
*/
AGESA_STATUS
AmdMemoryReadSPD (IN UINT32 Func, IN UINT32 Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
/*---------------------------------------------------------------------------------------
* L O C A L F U N C T I O N S
*---------------------------------------------------------------------------------------
*/
#endif

9
src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
View File

@ -24,14 +24,5 @@
#include "heapManager.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "dimmSpd.h"
#include "fam15tn_callouts.h"
AGESA_STATUS fam15tn_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
AGESA_STATUS Status;
Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
return Status;
}

2
src/northbridge/amd/agesa/family15tn/fam15tn_callouts.h
View File

@ -24,6 +24,4 @@
#include "AGESA.h"
AGESA_STATUS fam15tn_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
#endif /* CALLOUTS_AMD_AGESA_FAM15TN_H */

1
src/northbridge/amd/agesa/family16kb/Makefile.inc
View File

@ -22,4 +22,3 @@ romstage-y += dimmSpd.c
ramstage-y += northbridge.c
ramstage-y += fam16kb_callouts.c
ramstage-y += dimmSpd.c

119
src/northbridge/amd/agesa/family16kb/dimmSpd.c
View File

@ -24,119 +24,15 @@
#include "Porting.h"
#include "AGESA.h"
#include "amdlib.h"
#include "dimmSpd.h"
#include "chip.h"
#include "northbridge/amd/agesa/dimmSpd.h"
#define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
/*-----------------------------------------------------------------------------
*
* readSmbusByteData - read a single SPD byte from any offset
*/
static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
{
unsigned int status;
UINT64 limit;
address |= 1; // set read bit
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 1, 0x1F); // clear error status
__outbyte (iobase + 3, offset); // offset in eeprom
__outbyte (iobase + 4, address); // slave address and read bit
__outbyte (iobase + 2, 0x48); // read byte command
// time limit to avoid hanging for unexpected error status (should never happen)
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*-----------------------------------------------------------------------------
*
* readSmbusByte - read a single SPD byte from the default offset
* this function is faster function readSmbusByteData
*/
static int readSmbusByte (int iobase, int address, char *buffer)
{
unsigned int status;
UINT64 limit;
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 2, 0x44); // read command
// time limit to avoid hanging for unexpected error status
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*---------------------------------------------------------------------------
*
* readspd - Read one or more SPD bytes from a DIMM.
* Start with offset zero and read sequentially.
* Optimization relies on autoincrement to avoid
* sending offset for every byte.
* Reads 128 bytes in 7-8 ms at 400 KHz.
*/
static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
{
int index, error;
/* read the first byte using offset zero */
error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0);
if (error) return error;
/* read the remaining bytes using auto-increment for speed */
for (index = 1; index < count; index++)
{
error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]);
if (error) return error;
}
return 0;
}
static void writePmReg (int reg, int data)
{
__outbyte (0xCD6, reg);
__outbyte (0xCD7, data);
}
static void setupFch (int ioBase)
{
writePmReg (0x2D, ioBase >> 8);
writePmReg (0x2C, ioBase | 1);
__outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
}
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{
int spdAddress, ioBase;
int spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_agesa_family16kb_config *config = dev->chip_info;
@ -153,8 +49,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
spdAddress = config->spdAddrLookup
[info->SocketId] [info->MemChannelId] [info->DimmId];
if (spdAddress == 0) return AGESA_ERROR;
ioBase = 0xB00;
setupFch (ioBase);
return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
if (spdAddress == 0)
return AGESA_ERROR;
int err = hudson_readSpd(spdAddress, (void *) info->Buffer, 128);
if (err)
return AGESA_ERROR;
return AGESA_SUCCESS;
}

56
src/northbridge/amd/agesa/family16kb/dimmSpd.h
View File

@ -1,56 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*----------------------------------------------------------------------------------------
* M O D U L E S U S E D
*----------------------------------------------------------------------------------------
*/
#ifndef _DIMMSPD_H_
#define _DIMMSPD_H_
/*----------------------------------------------------------------------------------------
* D E F I N I T I O N S A N D M A C R O S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* T Y P E D E F S A N D S T R U C T U R E S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* P R O T O T Y P E S O F L O C A L F U N C T I O N S
*----------------------------------------------------------------------------------------
*/
/*----------------------------------------------------------------------------------------
* E X P O R T E D F U N C T I O N S
*----------------------------------------------------------------------------------------
*/
AGESA_STATUS
AmdMemoryReadSPD (IN UINT32 Func, IN UINT32 Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
/*---------------------------------------------------------------------------------------
* L O C A L F U N C T I O N S
*---------------------------------------------------------------------------------------
*/
#endif

8
src/northbridge/amd/agesa/family16kb/fam16kb_callouts.c
View File

@ -24,16 +24,8 @@
#include "heapManager.h"
#include "FchPlatform.h"
#include "cbfs.h"
#include "dimmSpd.h"
#include "fam16kb_callouts.h"
AGESA_STATUS fam16kb_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
{
AGESA_STATUS Status;
Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
return Status;
}

2
src/northbridge/amd/agesa/family16kb/fam16kb_callouts.h
View File

@ -24,6 +24,4 @@
#include "AGESA.h"
AGESA_STATUS fam16kb_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
#endif /* CALLOUTS_AMD_AGESA_FAM16KB_H */

2
src/southbridge/amd/agesa/hudson/Makefile.inc
View File

@ -30,7 +30,7 @@
INCLUDES += -Isrc/southbridge/amd/agesa/hudson
romstage-y += smbus.c
romstage-y += smbus.c smbus_spd.c
ramstage-y += hudson.c
ramstage-y += usb.c
ramstage-y += lpc.c

152
src/southbridge/amd/agesa/hudson/smbus_spd.c Normal file
View File

@ -0,0 +1,152 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/pci_def.h>
#include <device/device.h>
/* warning: Porting.h includes an open #pragma pack(1) */
#include "Porting.h"
#include "AGESA.h"
#include "amdlib.h"
#include <northbridge/amd/agesa/dimmSpd.h>
/*-----------------------------------------------------------------------------
*
* readSmbusByteData - read a single SPD byte from any offset
*/
static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
{
unsigned int status;
UINT64 limit;
address |= 1; // set read bit
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 1, 0x1F); // clear error status
__outbyte (iobase + 3, offset); // offset in eeprom
__outbyte (iobase + 4, address); // slave address and read bit
__outbyte (iobase + 2, 0x48); // read byte command
// time limit to avoid hanging for unexpected error status (should never happen)
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*-----------------------------------------------------------------------------
*
* readSmbusByte - read a single SPD byte from the default offset
* this function is faster function readSmbusByteData
*/
static int readSmbusByte (int iobase, int address, char *buffer)
{
unsigned int status;
UINT64 limit;
__outbyte (iobase + 0, 0xFF); // clear error status
__outbyte (iobase + 2, 0x44); // read command
// time limit to avoid hanging for unexpected error status
limit = __rdtsc () + 2000000000 / 10;
for (;;)
{
status = __inbyte (iobase);
if (__rdtsc () > limit) break;
if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
if ((status & 1) == 1) continue; // HostBusy set, keep waiting
break;
}
buffer [0] = __inbyte (iobase + 5);
if (status == 2) status = 0; // check for done with no errors
return status;
}
/*---------------------------------------------------------------------------
*
* readspd - Read one or more SPD bytes from a DIMM.
* Start with offset zero and read sequentially.
* Optimization relies on autoincrement to avoid
* sending offset for every byte.
* Reads 128 bytes in 7-8 ms at 400 KHz.
*/
static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
{
int index, error;
printk(BIOS_SPEW, "-------------READING SPD-----------\n");
printk(BIOS_SPEW, "iobase: 0x%08X, SmbusSlave: 0x%08X, count: %d\n",
iobase, SmbusSlaveAddress, count);
/* read the first byte using offset zero */
error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0);
if (error) {
printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
return error;
}
/* read the remaining bytes using auto-increment for speed */
for (index = 1; index < count; index++)
{
error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]);
if (error) {
printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
return error;
}
}
printk(BIOS_SPEW, "\n");
printk(BIOS_SPEW, "-------------FINISHED READING SPD-----------\n");
return 0;
}
static void writePmReg (int reg, int data)
{
__outbyte (0xCD6, reg);
__outbyte (0xCD7, data);
}
static void setupFch (int ioBase)
{
writePmReg (0x2D, ioBase >> 8);
writePmReg (0x2C, ioBase | 1);
__outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
}
int hudson_readSpd(int spdAddress, char *buf, size_t len)
{
int ioBase = 0xB00;
setupFch (ioBase);
return readspd (ioBase, spdAddress, buf, len);
}