soc/intel/cnl: Add Cometlake-H/S Q0 (10+2) CPU ID
The Q0 stepping has a different ID than P1. Reference: CML EDS Volume 1 (Intel doc #606599) Change-Id: Id1da42aa93ab3440ae743d943a00713b7df3f453 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66159 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -44,7 +44,8 @@
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#define CPUID_COMETLAKE_H_S_6_2_G0 0xa0650
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#define CPUID_COMETLAKE_H_S_6_2_G0 0xa0650
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#define CPUID_COMETLAKE_H_S_6_2_G1 0xa0653
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#define CPUID_COMETLAKE_H_S_6_2_G1 0xa0653
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#define CPUID_COMETLAKE_H_S_10_2_P0 0xa0651
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#define CPUID_COMETLAKE_H_S_10_2_P0 0xa0651
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#define CPUID_COMETLAKE_H_S_10_2_Q0_P1 0xa0654
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#define CPUID_COMETLAKE_H_S_10_2_P1 0xa0654
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#define CPUID_COMETLAKE_H_S_10_2_Q0 0xa0655
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#define CPUID_TIGERLAKE_A0 0x806c0
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#define CPUID_TIGERLAKE_A0 0x806c0
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#define CPUID_TIGERLAKE_B0 0x806c1
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#define CPUID_TIGERLAKE_B0 0x806c1
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#define CPUID_TIGERLAKE_R0 0x806d1
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#define CPUID_TIGERLAKE_R0 0x806d1
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@ -33,7 +33,8 @@ static struct {
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{ CPUID_COMETLAKE_H_S_6_2_G0, "Cometlake-H/S G0 (6+2)" },
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{ CPUID_COMETLAKE_H_S_6_2_G0, "Cometlake-H/S G0 (6+2)" },
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{ CPUID_COMETLAKE_H_S_6_2_G1, "Cometlake-H/S G1 (6+2)" },
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{ CPUID_COMETLAKE_H_S_6_2_G1, "Cometlake-H/S G1 (6+2)" },
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{ CPUID_COMETLAKE_H_S_10_2_P0, "Cometlake-H/S P0 (10+2)" },
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{ CPUID_COMETLAKE_H_S_10_2_P0, "Cometlake-H/S P0 (10+2)" },
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{ CPUID_COMETLAKE_H_S_10_2_Q0_P1, "Cometlake-H/S Q0/P1 (10+2)" },
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{ CPUID_COMETLAKE_H_S_10_2_P1, "Cometlake-H/S P1 (10+2)" },
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{ CPUID_COMETLAKE_H_S_10_2_Q0, "Cometlake-H/S Q0 (10+2)" },
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};
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};
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static struct {
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static struct {
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@ -66,7 +66,8 @@ static const struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G0 },
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G0 },
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G1 },
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G1 },
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 },
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 },
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 },
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P1 },
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{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0 },
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{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 },
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{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 },
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{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 },
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{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 },
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{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0 },
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{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0 },
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