mb/google/kohaku: Update overridetree.cb

Add common SoC config.
Disable PCIe WiFi.
Add digitizer.
Turn off native SD card interface.
No WWAN.

Add DA7219 driver to Kconfig.

BUG=b:130310626
BRANCH=none
TEST=compiles (no Hatch ref or Kohaku device to test)

Change-Id: I17d5ba6ce4ec412384e4a1678474b8d26499ba40
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32405
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Tim Wawrzynczak 2019-04-23 10:51:20 -06:00 committed by Furquan Shaikh
parent 40dee3d506
commit c60a830e44
3 changed files with 104 additions and 10 deletions

View File

@ -3,6 +3,7 @@ config BOARD_GOOGLE_BASEBOARD_HATCH
def_bool n def_bool n
select DRIVERS_GENERIC_GPIO_KEYS select DRIVERS_GENERIC_GPIO_KEYS
select DRIVERS_GENERIC_MAX98357A select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_DA7219
select DRIVERS_I2C_GENERIC select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID select DRIVERS_I2C_HID
select DRIVERS_I2C_SX9310 select DRIVERS_I2C_SX9310

View File

@ -201,7 +201,7 @@ chip soc/intel/cannonlake
device pci 16.4 off end # Management Engine Interface 3 device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4 device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on end # SATA device pci 17.0 on end # SATA
device pci 19.0 on end #I2C #4 device pci 19.0 on end # I2C #4
device pci 19.1 off end # I2C #5 device pci 19.1 off end # I2C #5
device pci 19.2 off end # UART #2 device pci 19.2 off end # UART #2
device pci 1a.0 off end # eMMC device pci 1a.0 off end # eMMC

View File

@ -1,5 +1,4 @@
chip soc/intel/cannonlake chip soc/intel/cannonlake
register "SerialIoDevMode" = "{ register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci,
@ -15,7 +14,101 @@ chip soc/intel/cannonlake
[PchSerialIoIndexUART2] = PchSerialIoDisabled, [PchSerialIoIndexUART2] = PchSerialIoDisabled,
}" }"
# No PCIe WiFi
register "PcieRpEnable[13]" = "0"
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| I2C0 | Trackpad |
#| I2C1 | Touchscreen |
#| I2C2 | Digitizer |
#| I2C4 | Audio |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.i2c[0] = {
.speed = I2C_SPEED_FAST,
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
},
.gspi[0] = {
.speed_mhz = 1,
.early_init = 1,
},
}"
device domain 0 on device domain 0 on
device pci 14.0 on
chip drivers/usb/acpi
device usb 0.0 on
chip drivers/usb/acpi
device usb 2.5 off end
end
chip drivers/usb/acpi
device usb 3.4 off end
end
end
end
end
device pci 14.5 off end # SDCard
device pci 15.0 on
chip drivers/i2c/hid
register "generic.hid" = ""PNP0C50""
register "generic.desc" = ""Synaptics Touchpad""
# TODO: enable this when b/123967687 is fixed.
# register "generic.wake" = "GPE0_DW2_27"
# also set next line to ACPI_IRQ_WAKE_EDGE_LOW
register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D21_IRQ)"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 0x2c on end
end
end # I2C 0
device pci 15.2 on
chip drivers/i2c/hid
register "generic.hid" = ""WCOM50C1""
register "generic.desc" = ""WCOM Digitizer""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A10)"
register "generic.reset_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x1"
device i2c 0x09 on end
end
end # I2C #2
device pci 19.0 on
chip drivers/i2c/da7219
# TODO: these settings were copied from another board
# with the same chip. verify the settings
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H0_IRQ)"
register "btn_cfg" = "50"
register "mic_det_thr" = "500"
register "jack_ins_deb" = "20"
register "jack_det_rate" = ""32ms_64ms""
register "jack_rem_deb" = "1"
register "a_d_btn_thr" = "0xa"
register "d_b_btn_thr" = "0x16"
register "b_c_btn_thr" = "0x21"
register "c_mic_btn_thr" = "0x3e"
register "btn_avg" = "4"
register "adc_1bit_rpt" = "1"
register "micbias_lvl" = "2600"
register "mic_amp_in_sel" = ""diff""
device i2c 0x1a on end
end
end end
# No PCIe WiFi
device pci 1d.5 off end
end # domain
end end