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vendorcode/intel/FSP2_0/CPX-SP: Declare struct RC_VERSION non-packed

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It is a bug acknowledged by Intel (IPS case 00600003) that has been
fixed for SRP but won't be fixed for CPX.

This fixes field offsets for fields that follow SYSTEM_STATUS.RcVersion

Change-Id: I5248734e2f086d39bb75b7b1359e60dfd8704200
Signed-off-by: Deomid "rojer" Ryabkov <rojer9@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51545
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Deomid "rojer" Ryabkov 2021-03-16 19:51:11 +00:00 committed by Patrick Georgi
parent 04f8ffee37
commit c60fd46420
1 changed files with 12 additions and 10 deletions
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22
src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_iiouds.h
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@ -56,6 +56,18 @@ are permitted provided that the following conditions are met:
#define MAX_LOGIC_IIO_STACK (MAX_IIO_STACK+2)
// RC version number structure.
typedef struct {
uint8_t Major;
uint8_t Minor;
uint8_t Revision;
uint16_t BuildNumber;
} RC_VERSION;
// Note: the struct is not packed for a reason: it is not packed in FSP code.
// It is a bug acknowledged by Intel (IPS case 00600003) that has been fixed for SRP
// but won't be fixed for CPX.
_Static_assert(sizeof(RC_VERSION) == 6, "Incorrect size of struct 'RC_VERSION'");
#pragma pack(1)
//--------------------------------------------------------------------------------------//
@ -77,16 +89,6 @@ typedef enum {
TYPE_MAX_MMIO_BAR
} MMIO_BARS;
///
/// RC version number structure.
///
typedef struct {
uint8_t Major;
uint8_t Minor;
uint8_t Revision;
uint16_t BuildNumber;
} RC_VERSION;
/**
IIO PCIe Ports
**/