drivers/intel/gma: Include gfx.asl by default for all platforms...

which select INTEL_GMA_ACPI. Rework brightness level includes and
platform-level asl files to avoid duplicate device definition for GFX0.

Include gfx.asl for Skylake/Kabylake, since all other soc/intel/common
platforms already do. Adjust mb/51nb/x210 to prevent device redefinition.

Some OSes (e.g. Windows, MacOS) require/prefer the ACPI device for
the IGD to exist, even if ACPI brightness controls are not utilized.
This change adds a GFX0 ACPI device for all boards whose platforms
select INTEL_GMA_ACPI without requiring non-functional brightness
controls to be added at the board level.

Change-Id: Ie71bd5fc7acd926b7ce7da17fbc108670fd453e0
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48862
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>

src/drivers/intel/gma/acpi/gma.asl

@@ -1,9 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-Device (GFX0)
+Scope (GFX0)
 {
-	Name (_ADR, 0x00020000)
-
 	OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
 	Field (GFXC, DWordAcc, NoLock, Preserve)
 	{

src/mainboard/51nb/x210/acpi/graphics.asl

@@ -1,8 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
-Device (GFX0)
+Scope (GFX0)
 {
-	Name (_ADR, 0x00020000)
 	Method (_DOS, 1, NotSerialized)
 	{
 		/* We never do anything in firmware, so _DOS is a noop */

src/northbridge/intel/gm45/acpi/gm45.asl

@@ -33,3 +33,6 @@ Device (PDRC)
 
 // PCIe graphics port 0:1.0
 #include "peg.asl"
+
+// Integrated graphics 0:2.0
+#include <drivers/intel/gma/acpi/gfx.asl>

src/northbridge/intel/haswell/acpi/hostbridge.asl

@@ -204,3 +204,6 @@ Device (PDRC)
 /* PCI Express Graphics */
 #include "peg.asl"
 #endif
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>

src/northbridge/intel/i945/acpi/i945.asl

@@ -77,4 +77,5 @@ Device (PDRC)
 #include "peg.asl"
 
 // Integrated graphics 0:2.0
+#include <drivers/intel/gma/acpi/gfx.asl>
 #include "igd.asl"

src/northbridge/intel/i945/acpi/igd.asl

@@ -1,9 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-Device (GFX0)
+Scope (GFX0)
 {
-	Name (_ADR, 0x00020000)
-
 	Name (BRIG, Package (0x12)
 	{
 		0xf,

src/northbridge/intel/ironlake/acpi/ironlake.asl

@@ -36,3 +36,6 @@ Device (PDRC)
 		Return(PDRS)
 	}
 }
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>

src/northbridge/intel/pineview/acpi/pineview.asl

@@ -32,3 +32,6 @@ Device (PDRC)
 
 // PCIe graphics port 0:1.0
 #include "peg.asl"
+
+// Integrated graphics 0:2.0
+#include <drivers/intel/gma/acpi/gfx.asl>

src/northbridge/intel/sandybridge/acpi/sandybridge.asl

@@ -52,3 +52,6 @@ Device (PDRC)
 		Return(PDRS)
 	}
 }
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>

src/northbridge/intel/x4x/acpi/x4x.asl

@@ -30,3 +30,6 @@ Device (PDRC)
 
 // PCIe graphics port 0:1.0
 #include "peg.asl"
+
+// Integrated graphics 0:2.0
+#include <drivers/intel/gma/acpi/gfx.asl>

src/soc/intel/baytrail/acpi/southcluster.asl

@@ -256,3 +256,6 @@ Scope (\_SB.PCI0)
 	// LPE Device
 	#include "lpe.asl"
 }
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>

src/soc/intel/braswell/acpi/southcluster.asl

@@ -272,3 +272,6 @@ Scope (\_SB.PCI0)
 	/* SCC Devices */
 	#include "scc.asl"
 }
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>

src/soc/intel/broadwell/acpi/hostbridge.asl

@@ -195,3 +195,6 @@ Device (PDRC)
 
 /* Configurable TDP */
 #include "ctdp.asl"
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>

src/soc/intel/skylake/acpi/pch.asl

@@ -65,3 +65,6 @@ Method (_OSC, 4)
 #if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX)
 #include <soc/intel/common/acpi/sgx.asl>
 #endif
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>