soc/intel/tigerlake: Add some helper macros for accessing TCSS DMA devices
Change-Id: I6289d2049fbbb6bb532be3d9e2355c563ec98d1b Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47410 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
parent
f1b4a7c9d4
commit
c67e3c1a90
|
@ -50,10 +50,12 @@
|
||||||
#define SA_DEV_TBT3 PCI_DEV(0, SA_DEV_SLOT_TBT, 3)
|
#define SA_DEV_TBT3 PCI_DEV(0, SA_DEV_SLOT_TBT, 3)
|
||||||
|
|
||||||
#define SA_DEV_SLOT_TCSS 0x0d
|
#define SA_DEV_SLOT_TCSS 0x0d
|
||||||
|
#define NUM_TCSS_DMA_FUNCTIONS 2
|
||||||
|
#define SA_DEVFN_TCSS_DMA(x) PCI_DEVFN(SA_DEV_SLOT_TCSS, ((x) + 2))
|
||||||
#define SA_DEVFN_TCSS_XHCI PCI_DEVFN(SA_DEV_SLOT_TCSS, 0)
|
#define SA_DEVFN_TCSS_XHCI PCI_DEVFN(SA_DEV_SLOT_TCSS, 0)
|
||||||
#define SA_DEVFN_TCSS_XDCI PCI_DEVFN(SA_DEV_SLOT_TCSS, 1)
|
#define SA_DEVFN_TCSS_XDCI PCI_DEVFN(SA_DEV_SLOT_TCSS, 1)
|
||||||
#define SA_DEVFN_TCSS_DMA0 PCI_DEVFN(SA_DEV_SLOT_TCSS, 2)
|
#define SA_DEVFN_TCSS_DMA0 SA_DEVFN_TCSS_DMA(0)
|
||||||
#define SA_DEVFN_TCSS_DMA1 PCI_DEVFN(SA_DEV_SLOT_TCSS, 3)
|
#define SA_DEVFN_TCSS_DMA1 SA_DEVFN_TCSS_DMA(1)
|
||||||
#define SA_DEV_TCSS_XHCI PCI_DEV(0, SA_DEV_SLOT_TCSS, 0)
|
#define SA_DEV_TCSS_XHCI PCI_DEV(0, SA_DEV_SLOT_TCSS, 0)
|
||||||
#define SA_DEV_TCSS_XDCI PCI_DEV(0, SA_DEV_SLOT_TCSS, 1)
|
#define SA_DEV_TCSS_XDCI PCI_DEV(0, SA_DEV_SLOT_TCSS, 1)
|
||||||
#define SA_DEV_TCSS_DMA0 PCI_DEV(0, SA_DEV_SLOT_TCSS, 2)
|
#define SA_DEV_TCSS_DMA0 PCI_DEV(0, SA_DEV_SLOT_TCSS, 2)
|
||||||
|
|
Loading…
Reference in New Issue