soc/intel/tigerlake: Remove FSP-T option in Kconfig
This code lacks the temp_ram_init_params sybols so the FSP-T option so it would fail to build. Change-Id: Ie7d75943d89a964d0189f921fc433e4b9adfb0c5 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36720 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michael Niewöhner
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@ -50,6 +50,8 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
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select SOC_INTEL_COMMON_PCH_BASE
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select SOC_INTEL_COMMON_RESET
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select SOC_INTEL_COMMON_BLOCK_CAR
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select INTEL_CAR_NEM_ENHANCED
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select SSE2
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select SUPPORT_CPU_UCODE_IN_CBFS
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select TSC_MONOTONIC_TIMER
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@ -174,32 +176,6 @@ config CBFS_SIZE
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hex
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default 0x200000
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choice
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prompt "Cache-as-ram implementation"
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default USE_TIGERLAKE_CAR_NEM_ENHANCED
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help
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This option allows you to select how cache-as-ram (CAR) is set up.
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config USE_TIGERLAKE_CAR_NEM_ENHANCED
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bool "Enhanced Non-evict mode"
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select SOC_INTEL_COMMON_BLOCK_CAR
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select INTEL_CAR_NEM_ENHANCED
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help
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A current limitation of NEM (Non-Evict mode) is that code and data
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sizes are derived from the requirement to not write out any modified
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cache line. With NEM, if there is no physical memory behind the
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cached area, the modified data will be lost and NEM results will be
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inconsistent. ENHANCED NEM guarantees that modified data is always
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kept in cache while clean data is replaced.
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config USE_TIGERLAKE_FSP_CAR
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bool "Use FSP CAR"
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select FSP_CAR
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help
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Use FSP APIs to initialize and tear down the Cache-As-Ram.
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endchoice
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config FSP_HEADER_PATH
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string "Location of FSP headers"
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default "src/vendorcode/intel/fsp/fsp2_0/tigerlake/"
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