mb/google/zork: Update _v3 romstage and wifi GPIO tables for dalboz
This change updates _v3 version of romstage and wifi GPIO tables to match v3 schematics. BUG=b:157165628, b:157744136, b:157743835 TEST=Compiles Signed-off-by: Martin Roth <martinroth@chromium.org> Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: Id8b46fcb4552af6eda5b50224b0557bae37f9ebd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2251392 Reviewed-by: Aaron Durbin <adurbin@google.com> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42723 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
8ae77f62cc
commit
c699255ba5
|
@ -52,6 +52,8 @@ static const struct soc_amd_gpio gpio_set_wifi_pre_v3[] = {
|
|||
static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = {
|
||||
/* PEN_POWER_EN - reset */
|
||||
PAD_GPO(GPIO_5, LOW),
|
||||
/* EN_PWR_TOUCHPAD_PS2 - reset */
|
||||
PAD_GPO(GPIO_6, LOW),
|
||||
/* EC_FCH_WAKE_L */
|
||||
PAD_GPI(GPIO_24, PULL_UP),
|
||||
PAD_WAKE(GPIO_24, PULL_UP, EDGE_LOW, S3_S4_S5),
|
||||
|
@ -60,12 +62,10 @@ static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = {
|
|||
PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
|
||||
/* PCIE_RST1_L - Variable timings (May remove) */
|
||||
PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
|
||||
/* WIFI_AUX_RESET */
|
||||
PAD_GPO(GPIO_29, LOW),
|
||||
/* NVME_AUX_RESET_L */
|
||||
PAD_GPO(GPIO_40, HIGH),
|
||||
/* WIFI_AUX_RESET_L */
|
||||
PAD_GPO(GPIO_42, HIGH),
|
||||
/* EN_PWR_TOUCHPAD_PS2 - reset */
|
||||
PAD_GPO(GPIO_67, LOW),
|
||||
/* EMMC_RESET - reset (default stuffing unused)*/
|
||||
PAD_GPO(GPIO_68, HIGH),
|
||||
/* EN_PWR_CAMERA - reset */
|
||||
|
@ -88,7 +88,7 @@ static const struct soc_amd_gpio gpio_set_stage_rom_v3[] = {
|
|||
|
||||
static const struct soc_amd_gpio gpio_set_wifi_v3[] = {
|
||||
/* EN_PWR_WIFI */
|
||||
PAD_GPO(GPIO_29, HIGH),
|
||||
PAD_GPO(GPIO_42, HIGH),
|
||||
};
|
||||
|
||||
static const struct soc_amd_gpio gpio_set_stage_ram[] = {
|
||||
|
|
Loading…
Reference in New Issue