vc/intel/fsp/fsp2_0/cooperlake_sp: Fix WW45 FSP Memory map HOB mismatch

Tested=On OCP Delta Lake, verify the memory map hob data are correct.

Change-Id: I86bd809e21270395c4115788e5521606e9dcc2fb
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Johnny Lin 2020-11-12 09:17:14 +08:00 committed by Patrick Georgi
parent 863b3ad45b
commit c6b77d5bf6
1 changed files with 1 additions and 1 deletions

View File

@ -147,7 +147,7 @@ typedef struct SystemMemoryMapHob {
UINT8 NumChPerMC; UINT8 NumChPerMC;
UINT8 numberEntries; // Number of Memory Map Elements UINT8 numberEntries; // Number of Memory Map Elements
SYSTEM_MEMORY_MAP_ELEMENT Element[(MAX_SOCKET * MAX_DRAM_CLUSTERS * MAX_SAD_RULES) + MAX_FPGA_REMOTE_SAD_RULES]; SYSTEM_MEMORY_MAP_ELEMENT Element[(MAX_SOCKET * MAX_DRAM_CLUSTERS * MAX_SAD_RULES) + MAX_FPGA_REMOTE_SAD_RULES];
UINT8 reserved4[2213]; UINT8 reserved4[2216];
MEMMAP_SOCKET Socket[MAX_SOCKET]; MEMMAP_SOCKET Socket[MAX_SOCKET];
UINT8 reserved5[1603]; UINT8 reserved5[1603];