From c6bb6be6d27f95851cf6b7cbb67ddbd1ee5c8c5d Mon Sep 17 00:00:00 2001 From: Ed Swierk Date: Wed, 29 Oct 2008 14:54:36 +0000 Subject: [PATCH] Enable SPI boot flash support on EP80579, which has the ICH7 register set (trivial). Signed-off-by: Ed Swierk Acked-by: Ed Swierk git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- util/flashrom/chipset_enable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c index 87b2380451..d7a5b024c1 100644 --- a/util/flashrom/chipset_enable.c +++ b/util/flashrom/chipset_enable.c @@ -767,7 +767,7 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x5031, "Intel EP80579", enable_flash_ich_dc}, + {0x8086, 0x5031, "Intel EP80579", enable_flash_ich7}, {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, "Intel ICH7/ICH7R", enable_flash_ich7}, {0x8086, 0x27b9, "Intel ICH7M", enable_flash_ich7},