GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/picasso: Relocate FSP-M to address in DRAM 

On Picasso, DRAM is up by the time FSP-M runs. This change relocates
FSP-M binary to a specific address (0x90000000) in DRAM. Currently,
this address is randomly chosen to ensure it does not overlap any of
the other stages. Once we have a unified memory map set up for
Picasso, this address can be updated along with it.

BUG=b:155322763,b:150746858,b:152909132

Change-Id: I1a49765f00de9f97fa3dbd5bc288a3ed0d7087f6
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41828
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Furquan Shaikh 2020-05-28 11:21:26 -07:00
parent 0c6abd786d
commit c6d89fba7a
2 changed files with 6 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/soc/amd/picasso/Kconfig
View File

@ -228,6 +228,10 @@ config MAINBOARD_POWER_RESTORE
return to S0. Otherwise the system will remain in S5 once power return to S0. Otherwise the system will remain in S5 once power
is restored. is restored.
config FSP_M_ADDR
hex
default 0x90000000
config X86_RESET_VECTOR config X86_RESET_VECTOR
hex hex
default 0x807fff0 default 0x807fff0

2
src/soc/amd/picasso/Makefile.inc
View File

@ -458,4 +458,6 @@ apu/amdfw-type := raw
endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR)
endif # ($(CONFIG_SOC_AMD_PICASSO),y) endif # ($(CONFIG_SOC_AMD_PICASSO),y)