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mb/google/brask/variants/moli: Override tdp pl1 value 

Follow the "619907 Alder Lake-S and Raptor Lake-S Platform" and "685472 Intel® Dynamic Tuning Technology (Intel® DTT)" to override tdp pl1 in 15w cpu MSR to 55w and in 28w cpu MSR to 64w.

BUG=b:236294162
TEST=emerge-brask coreboot and check MSR_Package Power Limit-1 in 15w and 28w CPU is correct.

Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com>
Change-Id: Icb3d7c72b672fbd3e2a9f7ad1f2d1cb2ffc798c6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66910
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Raihow Shi 2022-08-19 19:16:35 +08:00 committed by Martin Roth
parent eb5c3adcde
commit c6e26fbf85
1 changed files with 6 additions and 0 deletions
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6
src/mainboard/google/brya/variants/moli/overridetree.cb
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@ -34,6 +34,12 @@ chip soc/intel/alderlake
}" # Type-A port A2
register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3
register "tcc_offset" = "0" # TCC of 100C
register "power_limits_config[ADL_P_142_242_282_15W_CORE]" = "{
.tdp_pl1_override = 55,
}"
register "power_limits_config[ADL_P_282_482_28W_CORE]" = "{
.tdp_pl1_override = 64,
}"
device domain 0 on
device ref dtt on
chip drivers/intel/dptf