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mb/google/kahlee/variants/baseboard: Set STAPM percentage 

Default STAPM percentage causes a lot of thermal throttling on grunt.
AMD experimented with 80%, it works for grunt. This is initial code to
provide easy change path for other grunt based platforms.

BUG=b:111608748
TEST=build and boot grunt.

Change-Id: I22863f6ed76152bf872fce3e275f8a7fd8077504
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/28564
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Richard Spiegel 2018-09-10 13:42:00 -07:00 committed by Martin Roth
parent 1b25f1b47c
commit c703beb31d
3 changed files with 27 additions and 0 deletions
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21
src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
View File

@ -17,6 +17,8 @@
#include <amdblocks/agesawrapper.h> #include <amdblocks/agesawrapper.h>
#include <variant/gpio.h> #include <variant/gpio.h>
#include <boardid.h> #include <boardid.h>
#include <chip.h>
#include <soc/pci_devs.h>
static const PCIe_PORT_DESCRIPTOR PortList[] = { static const PCIe_PORT_DESCRIPTOR PortList[] = {
/* Initialize Port descriptor (PCIe port, Lanes 7:4, D2F1) for NC*/ /* Initialize Port descriptor (PCIe port, Lanes 7:4, D2F1) for NC*/
@ -147,8 +149,27 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
VOID __weak OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly) VOID __weak OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly)
{ {
const struct soc_amd_stoneyridge_config *cfg;
const struct device *dev = dev_find_slot(0, GNB_DEVFN);
struct _PLATFORM_CONFIGURATION *platform;
InitEarly->GnbConfig.PcieComplexList = (void *)&PcieComplex; InitEarly->GnbConfig.PcieComplexList = (void *)&PcieComplex;
InitEarly->GnbConfig.PsppPolicy = PsppBalanceLow; InitEarly->GnbConfig.PsppPolicy = PsppBalanceLow;
InitEarly->PlatformConfig.GnbAzI2sBusSelect = GnbAcpI2sBus; InitEarly->PlatformConfig.GnbAzI2sBusSelect = GnbAcpI2sBus;
InitEarly->PlatformConfig.GnbAzI2sBusPinConfig = GnbAcp2Tx4RxBluetooth; InitEarly->PlatformConfig.GnbAzI2sBusPinConfig = GnbAcp2Tx4RxBluetooth;
if (!dev || !dev->chip_info) {
printk(BIOS_WARNING, "Warning: Cannot find SoC devicetree"
" config, STAPM unchanged\n");
return;
}
cfg = dev->chip_info;
platform = &InitEarly->PlatformConfig;
if ((cfg->stapm_percent) && (cfg->stapm_time) && (cfg->stapm_power)) {
platform->PlatStapmConfig.CfgStapmScalar = cfg->stapm_percent;
platform->PlatStapmConfig.CfgStapmTimeConstant =
cfg->stapm_time;
platform->PkgPwrLimitDC = cfg->stapm_power;
platform->PkgPwrLimitAC = cfg->stapm_power;
platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled;
}
} }

3
src/mainboard/google/kahlee/variants/grunt/devicetree.cb
View File

@ -20,6 +20,9 @@ chip soc/amd/stoneyridge
register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP"
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "32 * MiB" register "uma_size" = "32 * MiB"
register "stapm_percent" = "80"
register "stapm_time" = "2500"
register "stapm_power" = "7800"
# Enable I2C0 for audio, USB3 hub at 400kHz # Enable I2C0 for audio, USB3 hub at 400kHz
register "i2c[0]" = "{ register "i2c[0]" = "{

3
src/soc/amd/stoneyridge/chip.h
View File

@ -51,6 +51,9 @@ struct soc_amd_stoneyridge_config {
size_t uma_size; size_t uma_size;
struct dw_i2c_bus_config i2c[STONEY_I2C_DEV_MAX]; struct dw_i2c_bus_config i2c[STONEY_I2C_DEV_MAX];
u8 stapm_percent;
u32 stapm_time;
u32 stapm_power;
}; };
typedef struct soc_amd_stoneyridge_config config_t; typedef struct soc_amd_stoneyridge_config config_t;