Fix up totally broken Super I/O config on the MS-6178. Add
PIRQ table to make most devices work. Random small fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann
parent
6503cd9d00
commit
c716254e16
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@ -28,7 +28,7 @@ end
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
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default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
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default XIP_ROM_SIZE = 65536
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default XIP_ROM_SIZE = 64 * 1024
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default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
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arch i386 end
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driver mainboard.o
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@ -78,6 +78,11 @@ dir /pc80
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config chip.h
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chip northbridge/intel/i82810 # Northbridge
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device apic_cluster 0 on # APIC cluster
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chip cpu/intel/socket_PGA370 # CPU
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device apic 0 on end # APIC
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end
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end
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device pci_domain 0 on
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device pci 0.0 on end # Host bridge
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device pci 1.0 off # Onboard video
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@ -87,47 +92,54 @@ chip northbridge/intel/i82810 # Northbridge
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# end
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end
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chip southbridge/intel/i82801xx # Southbridge
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device pci 1e.0 on # PCI bridge
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# chip drivers/pci/onboard
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# device pci 1.0 on end
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# register "rom_address" = "0xfff80000"
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# end
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end
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device pci 1f.0 on # ISA bridge
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chip superio/winbond/w83627hf
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device pnp 2e.8 on # Floppy
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# io 0x60 = 0x3f0
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io 0x60 = 0x3f2
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device pci 1e.0 on end # PCI bridge
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device pci 1f.0 on # ISA/LPC bridge
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chip superio/winbond/w83627hf # Super I/O
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device pnp 2e.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.9 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.a on # Parallel port
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device pnp 2e.1 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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drq 0x74 = 3
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end
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device pnp 2e.b on # PS/2 keyboard/mouse
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device pnp 2e.2 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 on # Com2 (only header on board)
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.5 on # PS/2 keyboard/mouse
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1 # Keyboard interrupt
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irq 0x72 = 12 # Mouse interrupt
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end
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device pnp 2e.c on end # Game port
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device pnp 2e.d on end # MIDI / MPU401
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device pnp 2e.6 on end # Consumer IR (TODO)
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device pnp 2e.7 on # Game port / MIDI / GPIO 1
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io 0x60 = 0x201
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io 0x62 = 0x330
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irq 0x70 = 9
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end
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device pnp 2e.8 on end # GPIO 2
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device pnp 2e.9 on end # GPIO 3
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device pnp 2e.a on end # ACPI
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device pnp 2e.b on # Hardware monitor
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io 0x60 = 0x290
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irq 0x70 = 5
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end
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end
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end
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device pci 1f.1 on end # IDE
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device pci 1f.2 on end # USB
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device pci 1f.3 on end # SMBus
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device pci 1f.5 on end # AC'97 audio
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device pci 1f.6 off end # AC'97 modem
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device pci 1f.6 on end # AC'97 modem
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end
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end
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chip cpu/intel/socket_PGA370 # CPU
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end
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end
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@ -67,15 +67,17 @@ default ROM_SIZE = 512 * 1024
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default HAVE_FALLBACK_BOOT = 1
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default HAVE_MP_TABLE = 0
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default HAVE_HARD_RESET = 0
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default HAVE_PIRQ_TABLE = 0 # FIXME
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default IRQ_SLOT_COUNT = 4 # FIXME
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default HAVE_PIRQ_TABLE = 1
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default IRQ_SLOT_COUNT = 0 # Override this in targets/*/Config.lb.
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default MAINBOARD_VENDOR = "N/A" # Override this in targets/*/Config.lb.
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default MAINBOARD_PART_NUMBER = "N/A" # Override this in targets/*/Config.lb.
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default ROM_IMAGE_SIZE = 64 * 1024
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default FALLBACK_SIZE = 128 * 1024
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default STACK_SIZE = 8 * 1024
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default HEAP_SIZE = 16 * 1024
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default HAVE_OPTION_TABLE = 0
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#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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default USE_OPTION_TABLE = 0
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default ROM_IMAGE_SIZE = 64 * 1024
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default FALLBACK_SIZE = 128 * 1024
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default STACK_SIZE = 0x2000
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default HEAP_SIZE = 0x4000
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default _RAMBASE = 0x00004000
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default CONFIG_ROM_PAYLOAD = 1
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default CROSS_COMPILE = ""
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@ -84,7 +86,7 @@ default HOSTCC = "gcc"
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default CONFIG_CONSOLE_SERIAL8250 = 1
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default TTYS0_BAUD = 115200
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default TTYS0_BASE = 0x3f8
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default TTYS0_LCS = 0x3
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default TTYS0_LCS = 0x3 # 8n1
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default DEFAULT_CONSOLE_LOGLEVEL = 9
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default MAXIMUM_CONSOLE_LOGLEVEL = 9
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default CONFIG_UDELAY_TSC = 1
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@ -93,4 +95,3 @@ default CONFIG_CONSOLE_VGA = 1
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default CONFIG_PCI_ROM_RUN = 1
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end
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@ -21,5 +21,4 @@
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extern struct chip_operations mainboard_msi_ms6178_ops;
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struct mainboard_msi_ms6178_config {
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int nothing;
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};
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@ -0,0 +1,47 @@
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/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/pirq_routing.h>
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const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE,
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PIRQ_VERSION,
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32 + 16 * IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
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0x00, /* Interrupt router bus */
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(0x1f << 3) | 0x0, /* Interrupt router device */
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0x1c00, /* IRQs devoted exclusively to PCI usage */
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0x8086, /* Vendor */
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0x7000, /* Device */
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0, /* Crap (miniport) */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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0x1a, /* Checksum */
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{
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/* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
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{0x00,(0x1e<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
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{0x00,(0x10<<3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
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{0x00,(0x01<<3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
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{0x00,(0x1f<<3)|0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
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}
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};
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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return copy_pirq_routing_table(addr);
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}
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@ -24,6 +24,17 @@ mainboard msi/ms6178
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option ROM_SIZE = 512 * 1024
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# option ROM_SIZE = (512 * 1024) - (32 * 1024)
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option MAINBOARD_VENDOR = "MSI"
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option MAINBOARD_PART_NUMBER = "MS-6178"
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option IRQ_SLOT_COUNT = 4
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option DEFAULT_CONSOLE_LOGLEVEL = 9
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option MAXIMUM_CONSOLE_LOGLEVEL = 9
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option CONFIG_CONSOLE_VGA = 1
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option CONFIG_PCI_ROM_RUN = 1
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romimage "normal"
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option USE_FALLBACK_IMAGE = 0
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option LINUXBIOS_EXTRA_VERSION = ".0Normal"
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