nb/intel/sandybridge: Use consistent comment style
Change-Id: Iacb1fb0a1309c3c23e670fee540514b6f546314a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49066 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -430,7 +430,7 @@ void dram_memorymap(ramctr_timing *ctrl, int me_uma_size)
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remaplimit = remapbase + MIN(4096, tom - me_uma_size) - toludbase - 1;
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remaplimit = remapbase + MIN(4096, tom - me_uma_size) - toludbase - 1;
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touudbase = remaplimit + 1;
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touudbase = remaplimit + 1;
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} else {
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} else {
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// Reclaim not possible
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/* Reclaim not possible */
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reclaim = 0;
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reclaim = 0;
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touudbase = tom - me_uma_size;
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touudbase = tom - me_uma_size;
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}
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}
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@ -752,11 +752,11 @@ static u32 encode_odt(u32 odt)
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{
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{
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switch (odt) {
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switch (odt) {
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case 30:
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case 30:
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return (1 << 9) | (1 << 2); // RZQ/8, RZQ/4
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return (1 << 9) | (1 << 2); /* RZQ/8, RZQ/4 */
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case 60:
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case 60:
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return (1 << 2); // RZQ/4
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return (1 << 2); /* RZQ/4 */
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case 120:
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case 120:
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return (1 << 6); // RZQ/2
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return (1 << 6); /* RZQ/2 */
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default:
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default:
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case 0:
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case 0:
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return 0;
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return 0;
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@ -2827,8 +2827,8 @@ void final_registers(ramctr_timing *ctrl)
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FOR_ALL_CHANNELS
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FOR_ALL_CHANNELS
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MCHBAR32(PM_TRML_M_CONFIG_ch(channel)) = 0x00000aaa;
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MCHBAR32(PM_TRML_M_CONFIG_ch(channel)) = 0x00000aaa;
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MCHBAR32(PM_BW_LIMIT_CONFIG) = 0x5f7003ff; // OK
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MCHBAR32(PM_BW_LIMIT_CONFIG) = 0x5f7003ff;
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MCHBAR32(PM_DLL_CONFIG) = 0x00073000 | ctrl->mdll_wake_delay; // OK
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MCHBAR32(PM_DLL_CONFIG) = 0x00073000 | ctrl->mdll_wake_delay;
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FOR_ALL_CHANNELS {
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FOR_ALL_CHANNELS {
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switch (ctrl->rankmap[channel]) {
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switch (ctrl->rankmap[channel]) {
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