mb/google/hatch/variants: Fix DPTF sensor IDs

There are indeed two temperature sensors hooked up to the EC, but they
are indexed as 0 and 1, not 1 and 2.

BUG=b:132999028
TEST=Boot hatch with hardened EC, observe no more index overflows

Change-Id: Ia7f503bc1dc941635db52fce40f217bf34da6d2b
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32920
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Evan Green 2019-05-21 15:39:00 -07:00 committed by Patrick Georgi
parent 298afb3140
commit c72dc05acc
1 changed files with 2 additions and 2 deletions

View File

@ -21,7 +21,7 @@
#define DPTF_CPU_ACTIVE_AC3 80 #define DPTF_CPU_ACTIVE_AC3 80
#define DPTF_CPU_ACTIVE_AC4 75 #define DPTF_CPU_ACTIVE_AC4 75
#define DPTF_TSR0_SENSOR_ID 1 #define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Thermal Sensor 1" #define DPTF_TSR0_SENSOR_NAME "Thermal Sensor 1"
#define DPTF_TSR0_PASSIVE 65 #define DPTF_TSR0_PASSIVE 65
#define DPTF_TSR0_CRITICAL 75 #define DPTF_TSR0_CRITICAL 75
@ -31,7 +31,7 @@
#define DPTF_TSR0_ACTIVE_AC3 42 #define DPTF_TSR0_ACTIVE_AC3 42
#define DPTF_TSR0_ACTIVE_AC4 39 #define DPTF_TSR0_ACTIVE_AC4 39
#define DPTF_TSR1_SENSOR_ID 2 #define DPTF_TSR1_SENSOR_ID 1
#define DPTF_TSR1_SENSOR_NAME "Thermal Sensor 2" #define DPTF_TSR1_SENSOR_NAME "Thermal Sensor 2"
#define DPTF_TSR1_PASSIVE 65 #define DPTF_TSR1_PASSIVE 65
#define DPTF_TSR1_CRITICAL 75 #define DPTF_TSR1_CRITICAL 75