cpu,soc/intel: Drop select SMP

Implicitly selected with MAX_CPUS != 1.

Change-Id: I4ac3e30e9f96cd52244b4bae73bafce0564d41e0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/cpu/intel/haswell/Kconfig

@@ -10,7 +10,6 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select MMX
 	select SSE2
 	select UDELAY_TSC

src/cpu/intel/model_1067x/Kconfig

@@ -4,7 +4,6 @@ config CPU_INTEL_MODEL_1067X
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_106cx/Kconfig

@@ -4,7 +4,6 @@ config CPU_INTEL_MODEL_106CX
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_2065x/Kconfig

@@ -9,7 +9,6 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_206ax/Kconfig

@@ -9,7 +9,6 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select MMX
 	select SSE2
 	select UDELAY_TSC

src/cpu/intel/model_6ex/Kconfig

@@ -4,7 +4,6 @@ config CPU_INTEL_MODEL_6EX
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_6fx/Kconfig

@@ -4,7 +4,6 @@ config CPU_INTEL_MODEL_6FX
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_f2x/Kconfig

@@ -4,7 +4,6 @@ config CPU_INTEL_MODEL_F2X
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select SMM_ASEG
 	select CPU_INTEL_COMMON

src/cpu/intel/model_f3x/Kconfig

@@ -4,7 +4,6 @@ config CPU_INTEL_MODEL_F3X
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select CPU_INTEL_COMMON
 	select CPU_INTEL_COMMON_HYPERTHREADING

src/cpu/intel/model_f4x/Kconfig

@@ -4,5 +4,4 @@ config CPU_INTEL_MODEL_F4X
 	select ARCH_VERSTAGE_X86_32
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
-	select SMP
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/soc/intel/baytrail/Kconfig

@@ -25,7 +25,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PCIEXP_COMMON_CLOCK
 	select REG_SCRIPT
 	select RTC
-	select SMP
 	select SPI_FLASH
 	select SSE2
 	select TSC_MONOTONIC_TIMER

src/soc/intel/braswell/Kconfig

@@ -29,7 +29,6 @@ config CPU_SPECIFIC_OPTIONS
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_HDA
 	select SOC_INTEL_COMMON_RESET
-	select SMP
 	select SPI_FLASH
 	select SSE2
 	select TSC_MONOTONIC_TIMER

src/soc/intel/broadwell/Kconfig

@@ -28,7 +28,6 @@ config CPU_SPECIFIC_OPTIONS
 	select REG_SCRIPT
 	select PARALLEL_MP
 	select RTC
-	select SMP
 	select SPI_FLASH
 	select SSE2
 	select TSC_SYNC_MFENCE

src/soc/intel/cannonlake/Kconfig

@@ -83,7 +83,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PARALLEL_MP_AP_WORK
 	select PLATFORM_USES_FSP2_0
 	select REG_SCRIPT
-	select SMP
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select SOC_INTEL_COMMON
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE

src/soc/intel/denverton_ns/Kconfig

@@ -25,7 +25,6 @@ config CPU_SPECIFIC_OPTIONS
 	select CACHE_MRC_SETTINGS
 	select PARALLEL_MP
 	select PCR_COMMON_IOSF_1_0
-	select SMP
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_CPU

src/soc/intel/icelake/Kconfig

@@ -33,7 +33,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PLATFORM_USES_FSP2_1
 	select FSP_PEIM_TO_PEIM_INTERFACE
 	select REG_SCRIPT
-	select SMP
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select CPU_INTEL_COMMON_SMM
 	select SOC_INTEL_COMMON

src/soc/intel/jasperlake/Kconfig

@@ -35,7 +35,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PLATFORM_USES_FSP2_1
 	select FSP_PEIM_TO_PEIM_INTERFACE
 	select REG_SCRIPT
-	select SMP
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select CPU_INTEL_COMMON_SMM
 	select SOC_INTEL_COMMON

src/soc/intel/skylake/Kconfig

@@ -46,7 +46,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PLATFORM_USES_FSP2_0
 	select REG_SCRIPT
 	select SA_ENABLE_DPR
-	select SMP
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select SOC_INTEL_COMMON
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE

src/soc/intel/tigerlake/Kconfig

@@ -35,7 +35,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PLATFORM_USES_FSP2_2
 	select FSP_PEIM_TO_PEIM_INTERFACE
 	select REG_SCRIPT
-	select SMP
 	select PMC_GLOBAL_RESET_ENABLE_LOCK
 	select CPU_INTEL_COMMON_SMM
 	select SOC_INTEL_COMMON

src/soc/intel/xeon_sp/Kconfig

@@ -39,7 +39,6 @@ config	CPU_SPECIFIC_OPTIONS
 	select IOAPIC
 	select PARALLEL_MP
 	select ACPI_NO_SMI_GNVS
-	select SMP
 	select INTEL_DESCRIPTOR_MODE_CAPABLE
 	select SOC_INTEL_COMMON_BLOCK
 	select SOC_INTEL_COMMON_BLOCK_CPU