sb/intel/nm10: Fix enabling HPET

RCBA_HPTC needs to be read back to consistently enable HPET.
This ought to fix raminit failing sometimes and SeaBIOS endlessly
waiting for user input.

TESTED on Intel D510MO, Fixes SeaBIOS waiting for input, without a
timeout.

Change-Id: I20a25fd97cd09fedb70469262c64d8d3828bb684
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35758
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/northbridge/intel/pineview/raminit.c

@@ -552,10 +552,12 @@ static void sdram_detect_ram_speed(struct sysinfo *s)
 static void enable_hpet(void)
 {
 	u32 reg32;
-	reg32 = RCBA32(0x3404);
+	reg32 = RCBA32(HPTC);
 	reg32 &= ~0x3;
 	reg32 |= (1 << 7);
-	RCBA32(0x3404) = reg32;
+	RCBA32(HPTC) = reg32;
+	/* On NM10 this only works if read back */
+	RCBA32(HPTC);
 	HPET32(0x10) = HPET32(0x10) | 1;
 }
 

src/southbridge/intel/i82801gx/lpc.c

@@ -310,6 +310,10 @@ static void enable_hpet(void)
 	reg32 |= (1 << 7); // HPET Address Enable
 	reg32 &= ~(3 << 0);
 	RCBA32(HPTC) = reg32;
+	/* On NM10 this only works if read back */
+	RCBA32(HPTC);
+
+	write32((u32 *)0xfed00010, read32((u32 *)0xfed00010) | 1);
 }
 
 static void enable_clock_gating(void)