soc/intel/common: Update the comments for CSE RX and TX functions
The patch updates the comments on return values and heci_reset() triggering during error scenarios of heci_receive() and heci_send() functions to reflect the current implementation. Test=Build the code for Gimble Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I6c6c3312602c772147cb315db9ea1753d84a0fb3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66755 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -412,8 +412,8 @@ send_one_message(uint32_t hdr, const void *buff)
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/*
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* Send message msg of size len to host from host_addr to cse_addr.
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* Returns 1 on success and 0 otherwise.
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* In case of error heci_reset() may be required.
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* Returns CSE_TX_RX_SUCCESS on success and other enum values on failure scenarios.
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* Also, in case of errors, heci_reset() is triggered.
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*/
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static enum cse_tx_rx_status
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heci_send(const void *msg, size_t len, uint8_t host_addr, uint8_t client_addr)
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@ -524,9 +524,9 @@ recv_one_message(uint32_t *hdr, void *buff, size_t maxlen, size_t *recv_len)
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* Receive message into buff not exceeding maxlen. Message is considered
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* successfully received if a 'complete' indication is read from ME side
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* and there was enough space in the buffer to fit that message. maxlen
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* is updated with size of message that was received. Returns 0 on failure
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* and 1 on success.
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* In case of error heci_reset() may be required.
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* is updated with size of message that was received.
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* Returns CSE_TX_RX_SUCCESS on success and other enum values on failure scenarios.
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* Also, in case of errors, heci_reset() is triggered.
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*/
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static enum cse_tx_rx_status heci_receive(void *buff, size_t *maxlen)
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{
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