slippy/falco/peppy: Fix SPD GPIO initialization.

SPD GPIOs were being read prior to initialization in romstage_common. To
fix, pass the copy_spd function to romstage_common, to be called at the
appropriate time (after PCH init, before DRAM init).

Change-Id: I2554813e56a58c8c81456f1a53cc8ce9c2030a73
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58608
Reviewed-on: http://review.coreboot.org/4237
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Aaron Durbin 2013-06-13 17:29:36 -07:00 committed by Alexandru Gagniuc
parent 752b1e6d5d
commit c7633f4f5e
7 changed files with 11 additions and 9 deletions

View File

@ -151,6 +151,7 @@ struct romstage_params {
const void *gpio_map; const void *gpio_map;
const struct rcba_config_instruction *rcba_config; const struct rcba_config_instruction *rcba_config;
unsigned long bist; unsigned long bist;
void (*copy_spd)(struct pei_data *);
}; };
void mainboard_romstage_entry(unsigned long bist); void mainboard_romstage_entry(unsigned long bist);
void romstage_common(const struct romstage_params *params); void romstage_common(const struct romstage_params *params);

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@ -246,6 +246,9 @@ void romstage_common(const struct romstage_params *params)
report_platform_info(); report_platform_info();
if (params->copy_spd != NULL)
params->copy_spd(params->pei_data);
sdram_initialize(params->pei_data); sdram_initialize(params->pei_data);
timestamp_add_now(TS_AFTER_INITRAM); timestamp_add_now(TS_AFTER_INITRAM);

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@ -155,11 +155,9 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map, .gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0], .rcba_config = &rcba_config[0],
.bist = bist, .bist = bist,
.copy_spd = copy_spd,
}; };
/* Prepare SPD data */
copy_spd(&pei_data);
/* Call into the real romstage main with this board's attributes. */ /* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params); romstage_common(&romstage_params);
} }

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@ -183,11 +183,9 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map, .gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0], .rcba_config = &rcba_config[0],
.bist = bist, .bist = bist,
.copy_spd = copy_spd,
}; };
/* Prepare SPD data */
copy_spd(&pei_data);
/* Call into the real romstage main with this board's attributes. */ /* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params); romstage_common(&romstage_params);

View File

@ -183,11 +183,9 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map, .gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0], .rcba_config = &rcba_config[0],
.bist = bist, .bist = bist,
.copy_spd = copy_spd,
}; };
/* Prepare SPD data */
copy_spd(&pei_data);
/* Call into the real romstage main with this board's attributes. */ /* Call into the real romstage main with this board's attributes. */
romstage_common(&romstage_params); romstage_common(&romstage_params);

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@ -19,6 +19,7 @@
*/ */
#include <stdint.h> #include <stdint.h>
#include <stddef.h>
#include <console/console.h> #include <console/console.h>
#include "cpu/intel/haswell/haswell.h" #include "cpu/intel/haswell/haswell.h"
#include "northbridge/intel/haswell/haswell.h" #include "northbridge/intel/haswell/haswell.h"
@ -126,6 +127,7 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map, .gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0], .rcba_config = &rcba_config[0],
.bist = bist, .bist = bist,
.copy_spd = NULL,
}; };
/* Call into the real romstage main with this board's attributes. */ /* Call into the real romstage main with this board's attributes. */

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@ -19,6 +19,7 @@
*/ */
#include <stdint.h> #include <stdint.h>
#include <stddef.h>
#include <console/console.h> #include <console/console.h>
#include "cpu/intel/haswell/haswell.h" #include "cpu/intel/haswell/haswell.h"
#include "northbridge/intel/haswell/haswell.h" #include "northbridge/intel/haswell/haswell.h"
@ -123,6 +124,7 @@ void mainboard_romstage_entry(unsigned long bist)
.gpio_map = &mainboard_gpio_map, .gpio_map = &mainboard_gpio_map,
.rcba_config = &rcba_config[0], .rcba_config = &rcba_config[0],
.bist = bist, .bist = bist,
.copy_spd = NULL,
}; };
/* Call into the real romstage main with this board's attributes. */ /* Call into the real romstage main with this board's attributes. */