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nb/intel: Remove unused 'barrier()' 

Change-Id: I0c33a1f3f9c33c15a901fe90258ed989e9641701
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36124
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS 2019-10-18 08:42:51 +02:00 committed by Patrick Georgi
parent 99bf4366a6
commit c7783a39f8
5 changed files with 0 additions and 6 deletions
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1
src/northbridge/intel/fsp_rangeley/northbridge.h
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@ -52,7 +52,6 @@
#define P_UNIT 4
#ifndef __ASSEMBLER__
static inline void barrier(void) { asm("" ::: "memory"); }
#define PCI_DEVICE_ID_RG_MIN 0x1F00
#define PCI_DEVICE_ID_RG_MAX 0x1F0F

1
src/northbridge/intel/haswell/haswell.h
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@ -202,7 +202,6 @@
#define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__
static inline void barrier(void) { asm("" ::: "memory"); }
void intel_northbridge_haswell_finalize_smm(void);

2
src/northbridge/intel/i945/i945.h
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@ -361,8 +361,6 @@
#define DMIDRCCFG 0xeb4 /* 32bit */
static inline void barrier(void) { asm("" ::: "memory"); }
int i945_silicon_revision(void);
void i945_early_initialization(void);
void i945_late_initialization(int s3resume);

1
src/northbridge/intel/nehalem/nehalem.h
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@ -245,7 +245,6 @@ typedef struct {
#define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__
static inline void barrier(void) { asm("" ::: "memory"); }
#define PCI_DEVICE_ID_SB 0x0104
#define PCI_DEVICE_ID_IB 0x0154

1
src/northbridge/intel/sandybridge/sandybridge.h
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@ -202,7 +202,6 @@ enum platform_type {
#define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__
static inline void barrier(void) { asm("" ::: "memory"); }
#ifdef __SMM__
void intel_sandybridge_finalize_smm(void);