diff --git a/Documentation/Intel/SoC/quark.html b/Documentation/Intel/SoC/quark.html index bd32b242ec..ea704a94c5 100644 --- a/Documentation/Intel/SoC/quark.html +++ b/Documentation/Intel/SoC/quark.html @@ -53,21 +53,58 @@ Build Instructions:

  1. Set up build environment
  2. +
  3. For the Galileo Gen 2, replace the following lines in + CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc: +
      gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8
    +
    +with: +
    #
    +# Quark configuration
    +#
    +  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|1
    +
    +#
    +# Specify Galileo HSUART1 serial port
    +#
    +[PcdsPatchableInModule.common]
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xff}
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0xA0019000
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4
    +
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|44236800
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|921600
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|3 # 8-bits, no parity
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|1 # Enable FIFO
    +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|16
    +
    +
  4. Build Instructions:
  5. -
  6. Set the following Kconfig values: +
  7. In the .config for coreboot, set the following Kconfig values: