From c7d5e4395f66bb1a19c6135fbf664ffdb2eb771d Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 1 Feb 2018 09:50:29 +0100 Subject: [PATCH] mainboard/amd/serengeti_cheetah: Fix coding style Change-Id: I380368873e0508c3a55ac1c4ea0de172e675cf3a Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/23538 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- .../amd/serengeti_cheetah/acpi_tables.c | 26 ++++++------ src/mainboard/amd/serengeti_cheetah/mptable.c | 40 ++++++++----------- 2 files changed, 29 insertions(+), 37 deletions(-) diff --git a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c index 41e12eb9c1..d700e1d41a 100644 --- a/src/mainboard/amd/serengeti_cheetah/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah/acpi_tables.c @@ -57,7 +57,7 @@ unsigned long acpi_fill_madt(unsigned long current) res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132_1, - res->base, gsi_base ); + res->base, gsi_base); gsi_base+=7; } @@ -67,7 +67,7 @@ unsigned long acpi_fill_madt(unsigned long current) res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132_2, - res->base, gsi_base ); + res->base, gsi_base); gsi_base+=7; } } @@ -75,9 +75,10 @@ unsigned long acpi_fill_madt(unsigned long current) int i; int j = 0; - for(i = 1; i< sysconf.hc_possible_num; i++) { + for (i = 1; i < sysconf.hc_possible_num; i++) { u32 d = 0; - if(!(sysconf.pci1234[i] & 0x1) ) continue; + if (!(sysconf.pci1234[i] & 0x1)) + continue; /* 8131 need to use +4 */ switch (sysconf.hcid[i]) { case 1: @@ -95,7 +96,7 @@ unsigned long acpi_fill_madt(unsigned long current) res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][0], - res->base, gsi_base ); + res->base, gsi_base); gsi_base+=d; } } @@ -104,7 +105,7 @@ unsigned long acpi_fill_madt(unsigned long current) res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][1], - res->base, gsi_base ); + res->base, gsi_base); gsi_base+=d; } @@ -116,7 +117,7 @@ unsigned long acpi_fill_madt(unsigned long current) } current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *) - current, 0, 0, 2, 5 ); + current, 0, 0, 2, 5); /* 0: mean bus 0--->ISA */ /* 0: PIC 0 */ /* 2: APIC 2 */ @@ -147,16 +148,15 @@ unsigned long mainboard_write_acpi_tables(device_t dev, unsigned long start, acp /* same htio, but different position? We may have to copy, change HCIN, and recalculate the checknum and add_table */ - for(i = 1; i < sysconf.hc_possible_num; i++) { /* 0: is hc sblink */ + for (i = 1; i < sysconf.hc_possible_num; i++) { /* 0: is hc sblink */ const char *file_name; - if((sysconf.pci1234[i] & 1) != 1 ) continue; + if ((sysconf.pci1234[i] & 1) != 1) + continue; u8 c; - if(i < 7) { + if (i < 7) c = (u8) ('4' + i - 1); - } - else { + else c = (u8) ('A' + i - 1 - 6); - } current = ALIGN(current, 8); printk(BIOS_DEBUG, "ACPI: * SSDT for PCI%c Aka hcid = %d\n", c, sysconf.hcid[i]); /* pci0 and pci1 are in dsdt */ ssdtx = (acpi_header_t *)current; diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c index 0210368a3e..9b05fc0366 100644 --- a/src/mainboard/amd/serengeti_cheetah/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah/mptable.c @@ -49,24 +49,23 @@ static void *smp_write_config_table(void *v) dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { + if (res) smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res2mmio(res, 0, 0)); - } } dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { + if (res) smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res2mmio(res, 0, 0)); - } } j = 0; - for(i = 1; i< sysconf.hc_possible_num; i++) { - if(!(sysconf.pci1234[i] & 0x1) ) continue; + for (i = 1; i < sysconf.hc_possible_num; i++) { + if (!(sysconf.pci1234[i] & 0x1)) + continue; switch(sysconf.hcid[i]) { case 1: /* 8132 */ @@ -74,18 +73,16 @@ static void *smp_write_config_table(void *v) dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { + if (res) smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res2mmio(res, 0, 0)); - } } dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { + if (res) smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res2mmio(res, 0, 0)); - } } break; } @@ -104,32 +101,29 @@ static void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (0 << 2)|3, m->apicid_8111, 0x13); /*Slot 3 PCI 32 */ - for(i = 0; i < 4; i++) { + for (i = 0; i < 4; i++) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (5 << 2)|i, m->apicid_8111, 0x10 + (1+i)%4); /* 16 */ - } /* Slot 4 PCI 32 */ - for(i = 0; i < 4; i++) { + for (i = 0; i < 4; i++) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (4 << 2)|i, m->apicid_8111, 0x10 + (0+i)%4); /* 16 */ - } /* Slot 1 PCI-X 133/100/66 */ - for(i = 0; i < 4; i++) { + for (i = 0; i < 4; i++) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, (1 << 2)|i, m->apicid_8132_2, (0+i)%4); - } /* Slot 2 PCI-X 133/100/66 */ - for(i = 0; i < 4; i++) { + for (i = 0; i < 4; i++) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (1 << 2)|i, m->apicid_8132_1, (1+i)%4); /* 25 */ - } j = 0; - for(i = 1; i< sysconf.hc_possible_num; i++) { - if(!(sysconf.pci1234[i] & 0x1) ) continue; + for (i = 1; i < sysconf.hc_possible_num; i++) { + if (!(sysconf.pci1234[i] & 0x1)) + continue; int ii; device_t dev; struct resource *res; @@ -141,9 +135,8 @@ static void *smp_write_config_table(void *v) res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { /* Slot 1 PCI-X 133/100/66 */ - for(ii = 0; ii < 4; ii++) { + for (ii = 0; ii < 4; ii++) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][1], (0 << 2)|ii, m->apicid_8132a[j][0], (0+ii)%4); - } } } @@ -152,9 +145,8 @@ static void *smp_write_config_table(void *v) res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { /* Slot 2 PCI-X 133/100/66 */ - for(ii = 0; ii < 4; ii++) { + for (ii = 0; ii < 4; ii++) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][2], (0 << 2)|ii, m->apicid_8132a[j][1], (0+ii)%4); /* 25 */ - } } }