soc/mediatek/mt8186: Add mtcmos init support
Add mtcmos to support display and audio. TEST=build pass BUG=b:202871018 Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com> Change-Id: Ib9d41d47f235376f524c3ff78f1fcc069cbc60cd Reviewed-on: https://review.coreboot.org/c/coreboot/+/59343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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@ -40,6 +40,7 @@ ramstage-y += ../common/auxadc.c
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ramstage-y += emi.c
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ramstage-y += ../common/flash_controller.c
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ramstage-y += ../common/gpio.c gpio.c
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ramstage-y += ../common/mtcmos.c mtcmos.c
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ramstage-y += ../common/i2c.c i2c.c
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ramstage-y += ../common/mcu.c
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ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
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@ -10,6 +10,7 @@
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#include <device/mmio.h>
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#include <soc/addressmap.h>
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#include <soc/mtcmos.h>
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#include <types.h>
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#define SPM_INIT_DONE_US 20
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@ -140,7 +141,7 @@ DEFINE_BIT(SYS_TIMER_START_EN_LSB, 0)
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PCM_SW_INT0)
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struct mtk_spm_regs {
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uint32_t poweron_config_en;
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uint32_t poweron_config_set;
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uint32_t spm_power_on_val0;
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uint32_t spm_power_on_val1;
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uint32_t spm_clk_con;
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@ -833,6 +834,8 @@ struct pwr_ctrl {
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/* Auto-gen End */
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};
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check_member(mtk_spm_regs, poweron_config_set, 0x0);
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check_member(mtk_spm_regs, dis_pwr_con, 0x354);
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check_member(mtk_spm_regs, ap_mdsrc_req, 0x430);
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check_member(mtk_spm_regs, ssusb_top_pwr_con, 0x9F0);
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check_member(mtk_spm_regs, ssusb_top_p1_pwr_con, 0x9F4);
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@ -853,6 +856,19 @@ struct dyna_load_pcm {
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static struct mtk_spm_regs *const mtk_spm = (void *)SPM_BASE;
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static const struct power_domain_data disp[] = {
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{
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.pwr_con = &mtk_spm->dis_pwr_con,
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.pwr_sta_mask = 0x1 << 21,
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.sram_pdn_mask = 0x1 << 8,
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.sram_ack_mask = 0x1 << 12,
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},
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};
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/* without audio mtcmos control in MT8186 */
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static const struct power_domain_data audio[] = {
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};
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int spm_init(void);
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#endif /* SOC_MEDIATEK_MT8186_SPM_H */
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@ -0,0 +1,23 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/mmio.h>
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#include <soc/infracfg.h>
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#include <soc/mtcmos.h>
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enum {
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DISP_PROT_STEP_2_MASK = 0x00000C06,
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DISP_PROT_STEP_1_MASK = 0x00001800,
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};
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void mtcmos_protect_display_bus(void)
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{
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write32(&mt8186_infracfg_ao->infra_topaxi_protecten_clr,
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DISP_PROT_STEP_2_MASK);
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write32(&mt8186_infracfg_ao->infra_topaxi_protecten_1_clr,
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DISP_PROT_STEP_1_MASK);
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}
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void mtcmos_protect_audio_bus(void)
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{
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/* No need to do protection since MT8186 doesn't have audio mtcmos. */
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}
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@ -384,7 +384,7 @@ static void spm_hw_s1_state_monitor(int en)
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static void spm_register_init(void)
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{
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/* Enable register control */
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write32(&mtk_spm->poweron_config_en,
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write32(&mtk_spm->poweron_config_set,
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SPM_REGWR_CFG_KEY | BCLK_CG_EN_LSB);
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/* Init power control register */
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