winbond/w83627hf: Drop early_init.c
Once w83627hf_set_clksel_48() is unified into winbond/common/early_init.c by /c/21331 (Unify w*_set_clksel_48()), this file is no longer needed and can be dropped. Build tested on select affected mainboards. Change-Id: I6a5e27fdd48c6e002c3a39dc92fef77e85aea209 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/21474 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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## GNU General Public License for more details.
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## GNU General Public License for more details.
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##
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##
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romstage-$(CONFIG_SUPERIO_WINBOND_W83627HF) += early_init.c
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ramstage-$(CONFIG_SUPERIO_WINBOND_W83627HF) += superio.c
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ramstage-$(CONFIG_SUPERIO_WINBOND_W83627HF) += superio.c
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@ -1,51 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2000 AG Electronics Ltd.
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* Copyright (C) 2003-2004 Linux Networx
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* Copyright (C) 2004 Tyan
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* Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <device/pnp.h>
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#include "w83627hf.h"
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static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
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{
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u16 port = dev >> 8;
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outb(0x87, port);
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outb(0x87, port);
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}
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static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
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{
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u16 port = dev >> 8;
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outb(0xaa, port);
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}
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/*
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* We duplicate this function, for non-ROMCC boards, from early_serial.c to
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* work around a limitation of ROMCC where we can no make early_serial.c into
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* link-time symbols and #include early_serial.c.
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*/
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void w83627hf_set_clksel_48(pnp_devfn_t dev)
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{
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u8 reg8;
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pnp_enter_ext_func_mode(dev);
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reg8 = pnp_read_config(dev, 0x24);
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reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
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pnp_write_config(dev, 0x24, reg8);
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pnp_exit_ext_func_mode(dev);
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}
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@ -109,8 +109,4 @@
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#define W83627HF_XSCNF 0x15
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#define W83627HF_XSCNF 0x15
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#define W83627HF_XWBCNF 0x16
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#define W83627HF_XWBCNF 0x16
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#include <arch/io.h>
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void w83627hf_set_clksel_48(pnp_devfn_t dev);
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#endif /* SUPERIO_WINBOND_W83627HF_H */
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#endif /* SUPERIO_WINBOND_W83627HF_H */
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