cpu/x86: add paging_set_default_pat() function
Add paging_set_default_pat() which sets up the PAT MSR according to util/x86/x86_page_tables.go. Using page attribute types require a matching of the PAT values with the page table entries. This function is just providing the default PAT MSR value to match against the utility. BUG=b:72728953 Change-Id: I7ed34a3565647ffc359ff102d3f6a59fbc93cc22 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/25715 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
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@ -144,3 +144,28 @@ void paging_set_pat(uint64_t pat)
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msr.hi = pat >> 32;
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wrmsr(MSR_IA32_PAT, msr);
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}
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/* PAT encoding used in util/x86/x86_page_tables.go. It matches the linux
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* kernel settings:
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* PTE encoding:
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* PAT
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* |PCD
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* ||PWT PAT
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* ||| slot
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* 000 0 WB : _PAGE_CACHE_MODE_WB
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* 001 1 WC : _PAGE_CACHE_MODE_WC
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* 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS
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* 011 3 UC : _PAGE_CACHE_MODE_UC
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* 100 4 WB : Reserved
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* 101 5 WP : _PAGE_CACHE_MODE_WP
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* 110 6 UC-: Reserved
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* 111 7 WT : _PAGE_CACHE_MODE_WT
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*/
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void paging_set_default_pat(void)
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{
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uint64_t pat = PAT_ENCODE(WB, 0) | PAT_ENCODE(WC, 1) |
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PAT_ENCODE(UC_MINUS, 2) | PAT_ENCODE(UC, 3) |
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PAT_ENCODE(WB, 4) | PAT_ENCODE(WP, 5) |
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PAT_ENCODE(UC_MINUS, 6) | PAT_ENCODE(WT, 7);
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paging_set_pat(pat);
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}
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@ -14,8 +14,18 @@ void paging_disable_pae(void);
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/* Set/Clear NXE bit in IA32_EFER MSR */
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void paging_set_nxe(int enable);
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#define PAT_UC 0
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#define PAT_WC 1
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#define PAT_WT 4
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#define PAT_WP 5
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#define PAT_WB 6
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#define PAT_UC_MINUS 7
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#define PAT_ENCODE(type, idx) (((uint64_t)PAT_ ## type) << 8*(idx))
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/* Set PAT MSR */
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void paging_set_pat(uint64_t pat);
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/* Set coreboot default PAT value. */
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void paging_set_default_pat(void);
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#define MAPPING_ERROR ((void *)0xffffffffUL)
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void *map_2M_page(unsigned long page);
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