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bg4cd, cosmos: use SPI_WRAPPER configuration mode 

The SOC code should include the SPI controller driver when configured.
Enable SPI support for cosmos.

BRANCH=none
BUG=chrome-os-partner:32631
TEST=cosmos builds

Change-Id: I8212f191b7d80f0bee86f746813edaf8e5ee6db1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fd4853be5157247bb73fc22b9d4f8300228fe6ce
Original-Change-Id: If7e12e2fb04e63c36d9696d13e08397b91a77a8c
Original-Commit-Id: 7b1d095e5df6a864d3564bbf7a20cc211f75629a
Original-Change-Id: If9dd80cb96120d34a0865f7882cd62e45fed749d
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/223750
Original-Reviewed-on: https://chromium-review.googlesource.com/223752
Reviewed-on: http://review.coreboot.org/9356
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Vadim Bendebury 2014-10-16 11:20:15 -07:00 committed by Patrick Georgi
parent 1816649b90
commit c8385ddd3b
3 changed files with 9 additions and 31 deletions
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7
src/mainboard/google/cosmos/Kconfig
View File

@ -25,10 +25,13 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ID_SUPPORT
select CHROMEOS
select CHROMEOS_VBNV_FLASH
select SOC_MARVELL_BG4CD
select MAINBOARD_HAS_BOOTBLOCK_INIT
select COMMON_CBFS_SPI_WRAPPER
select HAVE_HARD_RESET
select MAINBOARD_HAS_BOOTBLOCK_INIT
select RETURN_FROM_VERSTAGE
select SOC_MARVELL_BG4CD
select SPI_FLASH
select SPI_FLASH_SPANSION
config MAINBOARD_DIR
string

8
src/soc/marvell/bg4cd/Makefile.inc
View File

@ -19,23 +19,23 @@
bootblock-y += cbmem.c
bootblock-y += i2c.c
bootblock-y += media.c
bootblock-y += monotonic_timer.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c
verstage-y += i2c.c
verstage-y += media.c
verstage-y += monotonic_timer.c
verstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-y += cbmem.c
romstage-y += i2c.c
romstage-y += media.c
romstage-y += monotonic_timer.c
romstage-y += sdram.c
romstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-y += cbmem.c
ramstage-y += i2c.c
ramstage-y += media.c
ramstage-y += monotonic_timer.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c
$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
cp $< $@

25
src/soc/marvell/bg4cd/media.c
View File

@ -1,25 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <cbfs.h>
int init_default_cbfs_media(struct cbfs_media *media)
{
return 0;
}