superio/fintek/f71869ad: Fix incorrect LDN's

Turns out there are a few minor differences of the LDN's in the AD rev.
of this Fintek chip. 0x07 is in fact the WDT so renaming and remove the
now incorrect io mask. Add missing CIR LDN functionality and touch up
src inline doc.

Change-Id: I440aebad71d62d199d3283dd061933e76b21dda5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5696
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Edward O'Callaghan 2014-05-08 19:50:55 +10:00 committed by Kyösti Mälkki
parent 63fcb4a1f8
commit c848098b2f
2 changed files with 7 additions and 4 deletions

View File

@ -29,7 +29,8 @@
#define F71869AD_HWM 0x04 /* Hardware monitor */ #define F71869AD_HWM 0x04 /* Hardware monitor */
#define F71869AD_KBC 0x05 /* PS/2 keyboard and mouse */ #define F71869AD_KBC 0x05 /* PS/2 keyboard and mouse */
#define F71869AD_GPIO 0x06 /* General Purpose I/O (GPIO) */ #define F71869AD_GPIO 0x06 /* General Purpose I/O (GPIO) */
#define F71869AD_BSEL 0x07 /* BSEL */ #define F71869AD_WDT 0x07 /* WDT */
#define F71869AD_CIR 0x08 /* CIR */
#define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */ #define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */
#endif /* SUPERIO_FINTEK_F71869AD_H */ #endif /* SUPERIO_FINTEK_F71869AD_H */

View File

@ -104,8 +104,9 @@ static struct device_operations ops = {
* irq 0x72 = 12 # Mouse IRQ * irq 0x72 = 12 # Mouse IRQ
* end * end
* device pnp 4e.06 off end # GPIO * device pnp 4e.06 off end # GPIO
* device pnp 4e.07 on end # BSEL * device pnp 4e.07 on end # WDT
* device pnp 4e.0a off end # PME * device pnp 4e.08 off end # CIR
* device pnp 4e.0a on end # PME
* end # f71869ad * end # f71869ad
* *
*/ */
@ -117,7 +118,8 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, { &ops, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
{ &ops, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, }, { &ops, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
{ &ops, F71869AD_GPIO, }, { &ops, F71869AD_GPIO, },
{ &ops, F71869AD_BSEL, PNP_IO0, {0x07f8, 0}, }, { &ops, F71869AD_WDT, },
{ &ops, F71869AD_CIR, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
{ &ops, F71869AD_PME, }, { &ops, F71869AD_PME, },
}; };