nyan*: Detect watchdog resets and reset the whole machine.

When a watchdog reset happens, the SOC will reset but other parts of the
system might not. That puts the machine in a funny state and may prevent it
from booting properly.

BUG=chrome-os-partner:28559
TEST=Built for nyan, nyan_big and nyan_blaze. Booted normally, through EC
reset, software reset ("reboot" command from the terminal), and through watch
dog reset. Verified that the new code only triggered during the watchdog reset
and that the system rebooted and was able to boot without going into recovery
mode unnecessarily.
BRANCH=nyan

Change-Id: Id92411c928344547fcd97e45063e4aff52d2e9e8
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/198582
Reviewed-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit b298be41c0959c58aeb8be5bf15141549da2504c)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/7900
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

src/mainboard/google/nyan/Makefile.inc

@@ -32,6 +32,7 @@ bootblock-y += bootblock.c
 bootblock-y += pmic.c
 bootblock-y += reset.c
 
+romstage-y += reset.c
 romstage-y += romstage.c
 romstage-y += sdram_configs.c
 romstage-$(CONFIG_CHROMEOS) += chromeos.c

src/mainboard/google/nyan/romstage.c

@@ -27,12 +27,14 @@
 #include <cbmem.h>
 #include <console/cbmem_console.h>
 #include <console/console.h>
+#include <mainboard/google/nyan/reset.h>
 #include <romstage_handoff.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "sdram_configs.h"
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/nvidia/tegra124/chip.h>
 #include <soc/nvidia/tegra124/clk_rst.h>
+#include <soc/nvidia/tegra124/power.h>
 #include <soc/nvidia/tegra124/sdram.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
@@ -181,6 +183,15 @@ static void __attribute__((noinline)) romstage(void)
 	mmu_disable_range(0, 1);
 	dcache_mmu_enable();
 
+	/*
+	 * A watchdog reset only resets part of the system so it ends up in
+	 * a funny state. If that happens, we need to reset the whole machine.
+	 */
+	if (power_reset_status() == POWER_RESET_WATCHDOG) {
+		printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n");
+		cpu_reset();
+	}
+
 	/* For quality of the user experience, it's important to get
 	 * the video going ASAP. Because there are long delays in some
 	 * of the powerup steps, we do some very early setup here in

src/mainboard/google/nyan_big/Makefile.inc

@@ -32,6 +32,7 @@ bootblock-y += bootblock.c
 bootblock-y += pmic.c
 bootblock-y += reset.c
 
+romstage-y += reset.c
 romstage-y += romstage.c
 romstage-y += sdram_configs.c
 romstage-$(CONFIG_CHROMEOS) += chromeos.c

src/mainboard/google/nyan_big/romstage.c

@@ -27,12 +27,14 @@
 #include <cbmem.h>
 #include <console/cbmem_console.h>
 #include <console/console.h>
+#include <mainboard/google/nyan/reset.h>
 #include <romstage_handoff.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "sdram_configs.h"
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/nvidia/tegra124/chip.h>
 #include <soc/nvidia/tegra124/clk_rst.h>
+#include <soc/nvidia/tegra124/power.h>
 #include <soc/nvidia/tegra124/sdram.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
@@ -181,6 +183,15 @@ static void __attribute__((noinline)) romstage(void)
 	mmu_disable_range(0, 1);
 	dcache_mmu_enable();
 
+	/*
+	 * A watchdog reset only resets part of the system so it ends up in
+	 * a funny state. If that happens, we need to reset the whole machine.
+	 */
+	if (power_reset_status() == POWER_RESET_WATCHDOG) {
+		printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n");
+		cpu_reset();
+	}
+
 	/* For quality of the user experience, it's important to get
 	 * the video going ASAP. Because there are long delays in some
 	 * of the powerup steps, we do some very early setup here in

src/mainboard/google/nyan_blaze/Makefile.inc

@@ -32,6 +32,7 @@ bootblock-y += bootblock.c
 bootblock-y += pmic.c
 bootblock-y += reset.c
 
+romstage-y += reset.c
 romstage-y += romstage.c
 romstage-y += sdram_configs.c
 romstage-$(CONFIG_CHROMEOS) += chromeos.c

src/mainboard/google/nyan_blaze/romstage.c

@@ -27,12 +27,14 @@
 #include <cbmem.h>
 #include <console/cbmem_console.h>
 #include <console/console.h>
+#include <mainboard/google/nyan/reset.h>
 #include <romstage_handoff.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include "sdram_configs.h"
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/nvidia/tegra124/chip.h>
 #include <soc/nvidia/tegra124/clk_rst.h>
+#include <soc/nvidia/tegra124/power.h>
 #include <soc/nvidia/tegra124/sdram.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
@@ -181,6 +183,15 @@ static void __attribute__((noinline)) romstage(void)
 	mmu_disable_range(0, 1);
 	dcache_mmu_enable();
 
+	/*
+	 * A watchdog reset only resets part of the system so it ends up in
+	 * a funny state. If that happens, we need to reset the whole machine.
+	 */
+	if (power_reset_status() == POWER_RESET_WATCHDOG) {
+		printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n");
+		cpu_reset();
+	}
+
 	/* For quality of the user experience, it's important to get
 	 * the video going ASAP. Because there are long delays in some
 	 * of the powerup steps, we do some very early setup here in