diff --git a/src/mainboard/google/fizz/romstage.c b/src/mainboard/google/fizz/romstage.c
index 065ecd3a8a..405c4c18b4 100644
--- a/src/mainboard/google/fizz/romstage.c
+++ b/src/mainboard/google/fizz/romstage.c
@@ -22,11 +22,16 @@
 void mainboard_memory_init_params(FSPM_UPD *mupd)
 {
 	FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
+	const FSPM_ARCH_UPD *arch_upd = &mupd->FspmArchUpd;
 	/* Rcomp resistor */
 	const u16 rcomp_resistor[] = { 200, 81, 162 };
 	/* Rcomp target */
 	const u16 rcomp_target[] = { 100, 40, 40, 23, 40 };
 
+	/* SPD was saved in S0/S5 path, skips it when resumes from S3 */
+	if (arch_upd->BootMode == FSP_BOOT_ON_S3_RESUME)
+		return;
+
 	memcpy(&mem_cfg->RcompResistor, rcomp_resistor, sizeof(rcomp_resistor));
 	memcpy(&mem_cfg->RcompTarget, rcomp_target, sizeof(rcomp_target));