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cpu/intel/haswell: Add fast ramp voltage for Broadwell 

Backport commit 55228ba4b4 (broadwell: Changes from 2.2.0 ref code) to
Haswell, to eventually migrate Broadwell to use the same Haswell code.

Change-Id: I03d9ff16bcaab9091bd723ce933aa3f2d71e29b9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46921
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-28 23:53:45 +01:00
parent 8b043c058c
commit c86b119495
2 changed files with 11 additions and 2 deletions
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6
src/cpu/intel/haswell/haswell.h
View File

@ -3,6 +3,7 @@
#ifndef _CPU_INTEL_HASWELL_H #ifndef _CPU_INTEL_HASWELL_H
#define _CPU_INTEL_HASWELL_H #define _CPU_INTEL_HASWELL_H
#include <arch/cpu.h>
#include <stdint.h> #include <stdint.h>
/* CPU types without stepping */ /* CPU types without stepping */
@ -168,6 +169,11 @@ void set_power_limits(u8 power_limit_1_time);
int cpu_config_tdp_levels(void); int cpu_config_tdp_levels(void);
/* CPU identification */ /* CPU identification */
static inline u32 cpu_family_model(void)
{
return cpuid_eax(1) & 0x0fff0ff0;
}
static inline int haswell_is_ult(void) static inline int haswell_is_ult(void)
{ {
return CONFIG(INTEL_LYNXPOINT_LP); return CONFIG(INTEL_LYNXPOINT_LP);

7
src/cpu/intel/haswell/haswell_init.c
View File

@ -294,8 +294,11 @@ static void initialize_vr_config(void)
msr = rdmsr(MSR_VR_MISC_CONFIG2); msr = rdmsr(MSR_VR_MISC_CONFIG2);
msr.lo &= ~0xffff; msr.lo &= ~0xffff;
/* Allow CPU to control minimum voltage completely (15:8) and /* Allow CPU to control minimum voltage completely (15:8) and
* set the fast ramp voltage to 1110mV (0x6f in 10mV steps). */ set the fast ramp voltage in 10mV steps. */
msr.lo |= 0x006f; if (cpu_family_model() == BROADWELL_FAMILY_ULT)
msr.lo |= 0x006a; /* 1.56V */
else
msr.lo |= 0x006f; /* 1.60V */
wrmsr(MSR_VR_MISC_CONFIG2, msr); wrmsr(MSR_VR_MISC_CONFIG2, msr);
} }