Doc/psp_integration.md: Update infomation with latest document
Update coreboot.org PSP Firmware Documentation with current internal PSP documentation. Signed-off-by: Altamshali Hirani <al.hirani@amd.corp-partner.google.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Change-Id: I677f86614b0fdc6377fb2e27932ed3a8ded27102 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62910 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -117,14 +117,23 @@ implementations currently use combo tables.
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+--------------+---------------+------------------+----------------------------+
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| Size | 0x04 | 32 | Size of PSP entry in bytes |
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+--------------+---------------+------------------+----------------------------+
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| Location / | 0x08 | 64 | Location: Physical Address |
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| Location / | 0x08 | 62 | Location: Physical Address |
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| Value | | | of SPIROM location where |
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| | | | corresponding PSP entry |
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| | | | located. |
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| | | | |
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| | | | Value: 64-bit value for the|
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| | | | Value: 62-bit value for the|
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| | | | PSP Entry |
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+--------------+---------------+------------------+----------------------------+
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| Address Mode | 0x0F[7:6] | 2 | 00: x86 Physical address |
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| | | | 01: offset from start of |
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| | | | BIOS (flash offset) |
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| | | | 02: offset from start of |
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| | | | directory header |
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| | | | 03: offset from start of |
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| | | | partition |
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+--------------+---------------+------------------+----------------------------+
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```
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### PSP Directory Table Types
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@ -172,6 +181,10 @@ implementations currently use combo tables.
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* Intermediate Key Encryption Key, used to decrypt encrypted firmware images.
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This is mandatory in order to support encrypted firmware.
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**0x22**: PSP Token Unlock data
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* Used to support time-bound Secure Debug unlock during boot. This entry may
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be omitted if the Token Unlock debug feature is not required.
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**0x24**: Security policy binary
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* A security policy is applied to restrict the untrusted access to security
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sensitive regions.
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@ -200,10 +213,6 @@ implementations currently use combo tables.
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**0x52**: PSP boot loader usermode OEM application
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* Supported only in certain SKUs.
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**0x22**: PSP Token Unlock data
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* Used to support time-bound Secure Debug unlock during boot. This entry may
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be omitted if the Token Unlock debug feature is not required.
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### Firmware Version of Binaries
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Every firmware binary contains 256 bytes of a PSP Header, which includes
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@ -302,15 +311,25 @@ The BIOS Directory table structure is slightly different from the PSP Directory:
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+--------------+---------------+------------------+----------------------------+
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| SubProgram | 0x03[2:0] | 3 | Specify the SubProgram |
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+--------------+---------------+------------------+----------------------------+
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| Reserved | 0x03[7:3] | 5 | Reserved - Set to zero |
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| RomId | 0x03[4:3] | 2 | Which SPI device the |
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| | | | content is placed in |
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+--------------+---------------+------------------+----------------------------+
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| Writeable | 0x03[5] | 1 | Region is writable or read |
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| | | | only |
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+--------------+---------------+------------------+----------------------------+
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| Reserved | 0x03[7:6] | 2 | Reserved - Set to zero |
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+--------------+---------------+------------------+----------------------------+
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| Size | 0x04 | 32 | Memory Region Size |
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+--------------+---------------+------------------+----------------------------+
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| Source | 0x08 | 64 | Physical Address of SPIROM |
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| Source | 0x08 | 62 | Physical Address of SPIROM |
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| Address | | | location where the data for|
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| | | | the corresponding entry is |
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| | | | located |
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+--------------+---------------+------------------+----------------------------+
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| Entry Address| 0x0F[7:6] | 2 | Same as Entry Address Mode |
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| Mode | | | in PSP directory table |
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| | | | entry fields |
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+--------------+---------------+------------------+----------------------------+
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| Destination | 0x10 | 64 | Destination Address of |
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| Address | | | memory location where the |
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| | | | data for the corresponding |
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