mb/google/volteer/var/voxel: Add gpio-keys ACPI node for PENH
Use gpio_keys driver to add ACPI node for pen eject event. Also setting gpio wake pin for wake events. BUG=b:176213181 TEST=emerge-volteer coreboot chromeos-bootimage Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: If0959df5d0f069048777df81b0d4092ea90314eb Reviewed-on: https://review.coreboot.org/c/coreboot/+/49967 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -28,7 +28,7 @@ static const struct pad_config override_gpio_table[] = {
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/* B2 : VRALERT# ==> EN_PP3300_SSD */
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PAD_CFG_GPO(GPP_B2, 1, DEEP),
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/* B3 : CPU_GP2 ==> PEN_DET_ODL */
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PAD_CFG_GPI(GPP_B3, NONE, DEEP),
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PAD_CFG_GPI_GPIO_DRIVER(GPP_B3, NONE, PLTRST),
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/* B5 : ISH_I2C0_CVF_SDA */
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PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
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/* B6 : ISH_I2C0_CVF_SCL */
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@ -117,7 +117,7 @@ static const struct pad_config override_gpio_table[] = {
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PAD_CFG_GPO(GPP_D17, 1, DEEP),
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/* E1 : SPI1_IO2 ==> PEN_DET_ODL */
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PAD_CFG_GPI_SCI_LOW(GPP_E1, NONE, DEEP, EDGE_SINGLE),
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PAD_CFG_GPI_SCI(GPP_E1, NONE, DEEP, EDGE_SINGLE, NONE),
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/* E2 : SPI1_IO3 ==> WLAN_PCIE_WAKE_ODL */
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PAD_CFG_GPI(GPP_E2, NONE, DEEP),
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/* E3 : CPU_GP0 ==> USI_REPORT_EN */
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@ -146,6 +146,19 @@ chip soc/intel/tigerlake
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register "has_power_resource" = "1"
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device i2c 39 on end
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end
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chip drivers/generic/gpio_keys
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register "name" = ""PENH""
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# GPP_B3 is the IRQ source, and GPP_E1 is the wake source
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register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_B3)"
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register "key.wake_gpe" = "GPE0_DW2_01"
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register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
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register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
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register "key.dev_name" = ""EJCT""
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register "key.linux_code" = "SW_PEN_INSERTED"
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register "key.linux_input_type" = "EV_SW"
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register "key.label" = ""pen_eject""
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device generic 0 on end
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end
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end
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device ref i2c2 on
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chip drivers/i2c/sx9310
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