From c88a4794c8d7336495785ab2d55e219caf5173a9 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 16 Sep 2020 13:11:52 +0200 Subject: [PATCH] nb/intel/gm45: Answer question about conversion stepping A1 The datasheet briefly mentions what this mysterious stepping is about. Change-Id: I5bc1040b74fcdf3822b15e7564f8e4ccebd7d45f Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45449 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/northbridge/intel/gm45/gm45.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index 23ec0914b9..95457fb4b7 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -16,7 +16,7 @@ typedef enum { } fsb_clock_t; typedef enum { /* Steppings below B1 were pre-production, - conversion stepping A1 is... ? + conversion stepping A1 is a newer GL40 with support for 800 MT/s on FSB/DDR. We'll support B1, B2, B3, and conversion stepping A1. */ STEPPING_A0 = 0, STEPPING_A1 = 1,