diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index 6f158a057f..68f7fca483 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -14,8 +14,8 @@ static const struct mb_cfg ddr4_mem_config = {
 
 	.ddr_config = {
 
-		/* Baseboard uses only 100ohm Rcomp resistors */
-		.rcomp_resistor = {100, 100, 100},
+		/* Baseboard uses only 100ohm Rcomp resistor */
+		.rcomp_resistor = 100,
 
 		/* Baseboard Rcomp target values */
 		.rcomp_targets = {40, 30, 33, 33, 30},
@@ -148,8 +148,8 @@ static const struct mb_cfg ddr5_mem_config = {
 	.UserBd = BOARD_TYPE_MOBILE,
 
 	.ddr_config = {
-		/* Baseboard uses only 100ohm Rcomp resistors */
-		.rcomp_resistor = {100, 100, 100},
+		/* Baseboard uses only 100ohm Rcomp resistor */
+		.rcomp_resistor = 100,
 
 		/* Baseboard Rcomp target values */
 		.rcomp_targets = {50, 30, 30, 30, 27},
diff --git a/src/soc/intel/alderlake/include/soc/meminit.h b/src/soc/intel/alderlake/include/soc/meminit.h
index ae86cc6da4..9813d9345e 100644
--- a/src/soc/intel/alderlake/include/soc/meminit.h
+++ b/src/soc/intel/alderlake/include/soc/meminit.h
@@ -20,11 +20,10 @@ struct mem_ddr_config {
 	/* Dqs Pins Interleaved Setting. Enable/Disable Control */
 	bool dq_pins_interleaved;
 	/*
-	 * Rcomp resistor values.  These values represent the resistance in
-	 * ohms of the three rcomp resistors attached to the DDR_COMP_0,
-	 * DDR_COMP_1, and DDR_COMP_2 pins on the DRAM.
+	 * Rcomp resistor value. This values represents the resistance in
+	 * ohms of the rcomp resistor attached to the DDR_COMP pin on the SoC.
 	 */
-	uint16_t rcomp_resistor[3];
+	uint16_t rcomp_resistor;
 	/* Rcomp target values. */
 	uint16_t rcomp_targets[5];
 };
diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c
index 5b65ef063f..dcff61113a 100644
--- a/src/soc/intel/alderlake/meminit.c
+++ b/src/soc/intel/alderlake/meminit.c
@@ -28,9 +28,8 @@ static void meminit_lp5x(FSP_M_CONFIG *mem_cfg, const struct mem_lp5x_config *lp
 static void meminit_ddr(FSP_M_CONFIG *mem_cfg, const struct mem_ddr_config *ddr_config)
 {
 	mem_cfg->DqPinsInterleaved = ddr_config->dq_pins_interleaved;
-	memcpy(&mem_cfg->RcompResistor, ddr_config->rcomp_resistor,
-	       sizeof(mem_cfg->RcompResistor));
-	memcpy(&mem_cfg->RcompTarget, ddr_config->rcomp_targets, sizeof(mem_cfg->RcompTarget));
+	mem_cfg->RcompResistor = ddr_config->rcomp_resistor;
+	memcpy(mem_cfg->RcompTarget, ddr_config->rcomp_targets, sizeof(mem_cfg->RcompTarget));
 }
 
 static const struct soc_mem_cfg soc_mem_cfg[] = {